PIC16F913 datasheet(68/272 Pages) MICROCHIP

68 / 272 page

PIC16F917/916/914/913

DS41250E-page 66

Preliminary

3.6.1

PIN DESCRIPTIONS AND

DIAGRAMS

Each PORTE pin is multiplexed with other functions. The

pins and their combined functions are briefly described

here. For specific information about individual functions

such as the comparator or the A/D, refer to the

appropriate section in this data sheet.

3.6.1.1

RE0/AN5/SEG21

Figure 3-26 shows the diagram for this pin. The

RE0/AN5/SEG21pin is configurable to function as one

of the following:

• a general purpose I/O

• an analog input for the A/D

• an analog output for the LCD

3.6.1.2

RE1/AN6/SEG22

Figure 3-26 shows the diagram for this pin. The

RE1/AN6/SEG22 pin is configurable to function as one

of the following:

• a general purpose I/O

• an analog input for the A/D

• an analog output for the LCD

3.6.1.3

RE2/AN7/SEG23

Figure 3-26 shows the diagram for this pin. The

RE2/AN7/SEG23 pin is configurable to function as one

of the following:

• a general purpose I/O

• an analog input for the A/D

• an analog output for the LCD

3.6.1.4

RE3/MCLR/VPP

Figure 3-27 shows the diagram for this pin. The

RE3/MCLR/VPP pin is configurable to function as one

of the following:

• a digital input only

• as Master Clear Reset with weak pull-up

• a programming voltage reference input

FIGURE 3-26:

BLOCK DIAGRAM OF RE<2:0>

Data Bus

WR PORTE

WR TRISE

RD PORTE

SEG<23:21>

Schmitt

Trigger

RE<2:0> Pin

VDD

Data Latch

TRIS Latch

Analog Mode or

RD TRISE

AN<7:5>

SE<23:21> and LCDEN

PIC16F913 bảng dữ liệu(PDF) 68 Page - Microchip Technology

PIC16F913 bảng dữ liệu(HTML) 68 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL