STM32F469 datasheet(53/91 Pages) STMICROELECTRONICS

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Creating a graphical application with LTDC

4.7

LTDC peripheral configuration

This section describes the steps needed to configure the LTDC peripheral.

Note:

It is recommended to reset the LTDC peripheral before starting the configuration and also it

is recommended to guarantee that the peripheral is in reset state. The LTDC can be reset by

setting the corresponding bit in the RCC_APB2RSTR register, which resets the three clock

domains.

4.7.1

Display panel connection

The LTDC hardware interface provides eight bits per color bus, and fits perfectly for

RGB888 true color panels. The LTDC hardware interface provides also timing signals:

LCD_HSYNC, LCD_VSYNC, LCD_DE and LCD_CLK.

The LTDC GPIOs should be configured to the correspondent alternate function. For more

details on LTDC alternate functions availability versus GPIOs, refer to the alternate function

mapping table in the relevant datasheet.

Note:

All GPIOs have to be configured in very high-speed mode.

Connecting lower palette display panels

For display panels with a lower color palette (such as RGB666 and RGB565), the bus

connection should be done with the most significant bits of the data signals. Figure 30

shows an example of connecting an RGB666 display panel.

Figure 30. Connecting an RGB666 display panel

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