68HC705JB3 datasheet(89/134 Pages) FREESCALE

89 / 134 page

November 5, 1998

GENERAL RELEASE SPECIFICATION

MC68HC05JB3

UNIVERSAL SERIAL BUS MODULE

MOTOROLA

REV 1

10-21

10.5.3 USB Interrupt Register 1 (UIR1)

TXD1F — Endpoint 1/Endpoint 2 Data Transmit Flag

This read only bit is shared by Endpoint 1 and Endpoint 2. It is set after the data

stored in the shared Endpoint 1/Endpoint 2 transmit buffer has been sent and

an ACK handshake packet from the host is received. Once the next set of data

is ready in the transmit buffers, software must clear this ﬂag by writing a logic 1

to the TXD1FR bit. To enable the next data packet transmission, TX1E must

also be set. If TXD1F bit is not cleared, a NAK handshake will be returned in

the next IN transaction.

Reset clears this bit. Writing a logic 0 to TXD1F has no effect.

1 =

Transmit on Endpoint 1 or Endpoint 2 has occurred.

0 =

Transmit on Endpoint 1 or Endpoint 2 has not occurred.

EOPF — End of Packet Detect Flag

This read only bit is set when a valid End-of-Packet sequence is detected on

the D+ and D– lines. Software must clear this ﬂag by writing a logic 1 to the

EOPFR bit.

Reset clears this bit. Writing a logic 0 to EOPF has no effect.

1 =

End-of-Packet sequence has been detected.

0 =

End-of-Packet sequence has not been detected.

RESUMF — Resume Flag

This read only bit is set when USB bus activity is detected while the SUSPND

bit is set. Software must clear this ﬂag by writing a logic 1 to the RESUMFR bit.

Reset clears this bit. Writing a logic 0 to RESUMF has no effect.

1 =

USB bus activity has been detected.

0 =

No USB bus activity has been detected.

RESUMFR — Resume Flag Reset

Writing a logic 1 to this write only bit will clear the RESUMF bit if it is set. Writ-

ing a logic 0 to RESUMFR has no effect. Reset clears this bit.

TXD1IE — Endpoint 1/Endpoint 2 Transmit Interrupt Enable

This read/write bit enables the USB to generate an interrupt when the shared

Transmit Endpoint 1/Endpoint 2 interrupt ﬂag (TXD1F) bit becomes set. Reset

clears this bit.

1 =

USB interrupts enabled for Transmit Endpoints 1 and 2.

0 =

USB interrupts disabled for Transmit Endpoints 1 and 2.

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

UIR1

TXD1F

EOPF

RESUMF

TXD1IE

EOPIE

$003A

RESUMFR

TXD1FR

EOPFR

reset:

00000000

= Unimplemented

Figure 10-22. USB Interrupt Register 1(UIR1)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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