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SSD1963QL9R bảng dữ liệu(PDF) 71 Page - List of Unclassifed Manufacturers

tên linh kiện SSD1963QL9R
Giải thích chi tiết về linh kiện  1215KB Embedded Display SRAM LCD Display Controller
PDF  93 Pages
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nhà sản xuất  ETC2 [List of Unclassifed Manufacturers]
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SSD1963QL9R bảng dữ liệu(HTML) 71 Page - List of Unclassifed Manufacturers

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SSD1963
Rev 1.1
P 71/93
Jan 2010
Solomon Systech
The hardware pin, PWM is the output signal from SSD1963 to the system backlight driver. So it should configure PWM
module before enable DBC.
WRITE COMMAND “0xBE”
WRITE DATA “0x0E”
(set PWM frequency)
WRITE DATA “0xFF”
(dummy value if DBC is used)
WRITE DATA “0x09”
(enable PWM controlled by DBC)
WRITE DATA “0xFF”
WRITE DATA “0x00”
WRITE DATA “0x00”
WRITE COMMAND “0xD4”
(Define the threshold value)
WRITE DATA …..
WRITE COMMAND “0xD0”
WRITE DATA “0x0D”
(Enable DBC with Aggressive mode)
9.64 get_dbc_conf
Command
0xD1
Parameters
1
D/C
D7
D6
D5
D4
D3
D2
D1
D0
Hex
Command
0
1
1
0
1
0
0
0
1
D1
Parameter 1
1
0
A6
A5
0
A3
A2
1
A0
xx
Description
Get the current dynamic back light configuration.
A[6] : DBC Manual Brightness enable (POR = 1)
0
Enable
1
Disable
A[5] : Transition effect (POR = 0)
0
Transition effect disable
1
Transition effect enable
A[3:2] : Energy saving selection for DBC (POR = 00)
00
DBC is disable
01
Conservative mode
10
Normal mode
11
Aggressive mode
A[0] : Master enable DBC (POR = 0)
0
DBC disable
1
DBC enable



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