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SSD1963QL9R bảng dữ liệu(PDF) 14 Page - List of Unclassifed Manufacturers |
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SSD1963QL9R bảng dữ liệu(HTML) 14 Page - List of Unclassifed Manufacturers |
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14 / 93 page ![]() Solomon Systech Jan 2010 P 14/93 Rev 1.1 SSD1963 Table 6-2: LCD Interface Pin Mapping Pin Name Type Reference Voltage Level TFBGA Pin # LQFP Pin # Description LFRAME O VDDLCD D6 43 Vertical sync (Frame pulse) LLINE O VDDLCD B6 44 Horizontal sync (Line pulse) LSHIFT O VDDLCD A6 45 Pixel clock (Pixel shift signal) LDEN O VDDLCD C6 49 Data valid LDATA[23:0] O VDDLCD A2, A3, B2, B3, B8, C2, C3, C4, C5, C7, C8, D2, D3, D4, D5, D7, D8, E1, E2, E3, E4, F1, F2, F3 28, 29, 30, 31, 35, 59, 60, 61, 62, 63, 67, 68, 69, 70, 71, 72, 76, 77, 78, 79, 80, 81, 85, 86 RGB data GPIO[3:0] IO VDDLCD A7, A8, A9, B7 36, 37, 38, 39 These pins can be configured for display miscellaneous signals or as general purpose I/O. Default as input GAMAS [1:0] O VDDLCD A4, B4 52, 53 Gamma selection for panel PWM O VDDLCD B5 51 PWM output for backlight driver Table 6-3: Control Signal Pin Mapping Pin Name Type Reference Voltage Level TFBGA Pin # LQFP Pin # Description RESET# I VDDIO J7 127 Master synchronize reset CONF I VDDIO H8 128 MCU interface configuration 0: 6800 Interface 1: 8080 Interface Table 6-4: Power Pin Mapping Pin Name Type TFBGA Pin # LQFP Pin # Description VDDD P E6, F6 1, 6, 14, 21, 25, 32, 40, 46, 56, 64, 73, 82, 93, 102, 110, 119, 126 Power supply for internal digital circuit VDDLCD P B1, C1 27, 34, 42, 48, 54, 58, 66, 75, 84 Power supply for LCD interface related pads VDDPLL P E9 18 Power supply for internal analog circuit and analog I/O pads VDDIO P J9 4, 12, 16, 95, 97, 100, 108, 117, 124 Power supply for digital I/O pads VSS P D1, E5, F5, J8 2, 3, 5, 13, 17, 20, 23, 26, 33, 41, 47, 55, 57, 65, 74, 83, 94, 96, 101, 109, 118, 125 Ground for internal digital circuit VSSPLL P D9 19 Ground for internal analog circuit and analog I/O pads |
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