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SSD1963QL9R bảng dữ liệu(PDF) 31 Page - List of Unclassifed Manufacturers

tên linh kiện SSD1963QL9R
Giải thích chi tiết về linh kiện  1215KB Embedded Display SRAM LCD Display Controller
PDF  93 Pages
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nhà sản xuất  ETC2 [List of Unclassifed Manufacturers]
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SSD1963QL9R bảng dữ liệu(HTML) 31 Page - List of Unclassifed Manufacturers

Back Button SSD1963QL9R Datasheet HTML 27Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 28Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 29Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 30Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 31Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 32Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 33Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 34Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 35Page - List of Unclassifed Manufacturers Next Button
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 31 / 93 page
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SSD1963
Rev 1.1
P 31/93
Jan 2010
Solomon Systech
SP[15:8] : Start page (row) number high byte (POR = 00000000)
SP[7:0] : Start page (row) number low byte (POR = 00000000)
EP[15:8] : End page (row) number high byte (POR = 00000000)
EP[7:0] : End page (row) number low byte (POR = 00000000)
Note : SP[15:0] must always be equal to or less than EP[15:0]
Figure 9-4: Set Page Address example
SP[15:0]
EP[15:0]
9.18 write_memory_start
Command
0x2C
Parameters
None
D/C
D7
D6
D5
D4
D3
D2
D1
D0
Hex
Command
0
0
0
1
0
1
1
0
0
2C
Description
Transfer image information from the host processor interface to the SSD1963 starting at the location provided by
set_column _address (0x2A) and set _page_address (0x2B).
If set_address_mdoe (0x36) A[5] = 0:
The column and page address are reset to the Start Column (SC) and Start Page (SP), respectively.
Pixel Data 1 is stored in frame buffer at (SC, SP). The column address is then incremented and pixels are written to the
frame buffer until the column address equals the End Column (EC) value. The column address is then reset to SC and the
page address is incremented. Pixels are written to the frame buffer until the page address equals the End Page (EP) value
and the column address equals the EC value, or the host processor sends another command. If the number of pixels
exceeds (EC – SC + 1) * (EP – SP + 1) the extra pixels are ignored.
If set_address_mode (0x36) A[5] = 1:
The column and page address are reset to the Start Column (SC) and Start Page (SP), respectively.
Pixel Data 1 is stored in frame buffer at (SC, SP). The page address is then incremented and pixels are written to the
frame buffer until the page address equals the End Page (EP) value. The page address is then reset to SP and the column
address is incremented. Pixels are written to the frame buffer until the column address equals the End column (EC) value
and the page address equals the EP value, or the host processor sends another command. If the number of pixels exceeds
(EC – SC + 1) * (EP – SP + 1) the extra pixels are ignored.



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