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ADV7183ABST bảng dữ liệu(PDF) 86 Page - Analog Devices

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ADV7183ABST bảng dữ liệu(HTML) 86 Page - Analog Devices

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ADV7183A
Rev. A | Page 86 of 104
Table 195. Register 0x39 to 0x3A
Bit
Subaddress
Register
Bit Description
7
6
5
4
3
2
1
0
Comments
Notes
0x39
0
0
0
Adaptive 5-line, 3-tap luma comb
1
0
0
Use low-pass notch
1
1
0
Fixed luma comb
Top lines of
memory
1
1
0
Fixed luma comb (5-line)
All lines of
memory
YCMP[2:0]. Luma Comb
mode, PAL.
1
1
1
Fixed luma comb (3-line)
Bottom lines
of memory
0
0
0
3-line adaptive for CTAPSN = 01
4-line adaptive for CTAPSN = 10
5-line adaptive for CTAPSN = 11
1
0
0
Disable chroma comb
1
0
1
Fixed 2-line for CTAPSN = 01
Top lines of
memory
Fixed 3-line for CTAPSN = 10
Fixed 4-line for CTAPSN = 11
1
1
0
Fixed 3-line for CTAPSN = 01
All lines of
memory
Fixed 4-line for CTAPSN = 10
Fixed 5-line for CTAPSN = 11
1
1
1
Fixed 2-line for CTAPSN = 01
Bottom lines
of memory
Fixed 3-line for CTAPSN = 10
CCMP[2:0]. Chroma
Comb mode, PAL.
Fixed 4-line for CTAPSN = 11
0
0
Adapts 5-lines – 2 lines (2 taps)
0
1
Not used
1
0
Adapts 5 lines – 3 lines (3 taps)
PAL Comb
Control
CTAPSP[1:0]. Chroma
comb taps, PAL.
1
1
Adapts 5 lines – 4 lines (4 taps)
0x3A
Reserved
0
Set as default
0
ADC2 normal operation
PWRDN_ADC_2. Enables
power-down of ADC2.
1
Power down ADC2
0
ADC1 normal operation
PWRDN_ADC_1. Enables
power-down of ADC1.
1
Power down ADC1
0
ADC0 normal operation
PWRDN_ADC_0. Enables
power-down of ADC0.
1
Power down ADC0
Reserved
0
0
0
1
Set as default



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