DSP56857 datasheet(595/662 Pages) FREESCALE

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Appendix B - Programmer’s Sheets, Rev. 4

Freescale Semiconductor

B-93

Preliminary

Bits

Name

Description

TCF

Timer Compare Flag

This bit is set when a successful compare occurs. Cleared by writing a 0 to it.

TCFIE

Timer Compare Flag Interrupt Enable

When set, this bit enables interrupts when the TCF bit is set.

TOF

Timer Overflow Flag

This bit is set when the counter rolls over its maximum value $FFFF or $0000, depending on count

direction. Clear the bit by writing 0 to it.

TOFIE

Timer Overflow Flag Interrupt Enable

When set, this bit enables interrupts when the TOF bit is set.

IEF

Input Edge Flag

This bit is set when a positive input transition occurs. Clear the bit by writing 0 to it.

IEFIE

Input Edge Flag Interrupt Enable

When set, this bit enables interrupts when the IEF bit is set.

IPS

Input Polarity Select

When set, this bit inverts the input signal polarity.

INPUT

External Input Signal

This read-only bit reflects the current state of the external input pin selected via the secondary

count source after application of the IPS bit.

10 of 11

TMR Status/Control Registers (SCR)

TMR

TMR Status/Control

$1FFE80 + $7, $F,

$17, $1F

Bits

Read

TCF TCFIE TOF TOFOE IEF IEFIE

IPS

INPUT

CM MSTR EEOF VAL

OPS OEN

Write

FORCE

Reset

000

denotes Reserved Bits

See the following page for continuation of this register

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