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DSP56857 bảng dữ liệu(PDF) 407 Page - Freescale Semiconductor, Inc

tên linh kiện DSP56857
Giải thích chi tiết về linh kiện  Digitial Signal Controller
PDF  662 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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DSP56857 bảng dữ liệu(HTML) 407 Page - Freescale Semiconductor, Inc

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Module Memory Maps
General Purpose Input/Output (GPIO), Rev. 4
Freescale Semiconductor
15-7
Table 15-5. GPIO D Memory Map (GPIOD_BASE = $1FFE6C)
Address Offset
Register Acronym
Register Name
Access Type
Chapter Location
Base + $0
GPIO_D_PER
Peripheral Enable Register
Read/Write
Section 15.8.4
Base + $1
GPIO_D_DDR
Data Direction Register
Read/Write
Section 15.8.12
Base + $2
GPIO_D_DR
Data Register
Read/Write
Section 15.8.20
Base + $3
GPIO_D_PUR
Pull-Up Enable Register
Read/Write
Section 15.8.28
Add.
Offset
Register Name
15
14
13
12
11
10
9876
54321
0
$0
PER
R
1
1
1
1
1
1
1
1
1
1
PE
W
$1
DDR
R
0
0
0
0
0
0
0
0
0
0
DD
W
$2
DR
R
0
0
0
0
0
0
0
0
0
0
DATA
W
$3
PUR
R
1
1
1
1
1
1
1
1
1
1
PUE
W
R
0
Read as 0
W
Reserved
Figure 15-5. GPIO D Register Map Summary
Table 15-6. GPIO E Memory Map (GPIOE_BASE = $1FFE70)
Address Offset
Register Acronym
Register Name
Access Type
Chapter Location
Base + $0
GPIO_E_PER
Peripheral Enable Register
Read/Write
Section 15.8.5
Base + $1
GPIO_E_DDR
Data Direction Register
Read/Write
Section 15.8.13
Base + $2
GPIO_E_DR
Data Register
Read/Write
Section 15.8.21
Base + $3
GPIO_E_PUR
Pull-Up Enable Register
Read/Write
Section 15.8.29
Add.
Offset
Register Name
15
14
13
12
11
10
9876
54321
0
$0
PER
R
1
1
1
1
1
1
1
1
1
1
1
1
PE
W
$1
DDR
R
0
0
0
0
0
0
0
0
0
0
0
0
DD
W
$2
DR
R
0
0
0
0
0
0
0
0
0
0
0
0
DATA
W
$3
PUR
R
1
1
1
1
1
1
1
1
1
1
1
1
PUE
W
R
0
Read as 0
W
Reserved
Figure 15-6. GPIO E Register Map Summary



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