DSP56857 datasheet(404/662 Pages) FREESCALE

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Functional Description

5685X Digital Signal Controller User Manual, Rev. 4

15-4

Freescale Semiconductor

15.4 Functional Description

Each GPIO pin can be configured as either an input (with or without pull-up) or an output.

pull-ups are configured by writing to the Pull-Up Enable (PUE) Registers and are automatically

disabled when the pin is being used as an output in either the Normal mode or the GPIO mode.

15.5 Modes of Operation

The GPIO module design contains two major modes of operation.

15.5.1 Normal Mode

This can also be thought of as Peripheral Controlled mode. The peripheral module controls the

output enable and any output data to the I/O pad and any input data from the pad is passed to the

peripheral. Pull-up enables are controlled by a GPIO register.

15.5.2 GPIO Mode

In this mode, the GPIO module controls the output enable to the pad and supplies any data to be

output. Also, any input data can be read from a GPIO memory mapped register. Pull-up enables

are controlled by a GPIO register.

In the GPIO mode, the Data Direction Register (DDR) supplies the output enable to the I/O pad

to control its direction. The DR supplies the output data if DDR is asserted. The value of the data

on the I/O pad can be read by reading Data Register (DR) when DDR is 0. When in GPIO mode

the output data from the GPIO to the peripheral module will be driven high and the output data

and enable from the peripheral are ignored. The pull-up resistor can be enabled by writing to the

PUE Register. The pull-up resistor will be disabled as long as the DDR is set to the Output mode.

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