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HT67F5652 bảng dữ liệu(PDF) 162 Page - Holtek Semiconductor Inc |
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HT67F5652 bảng dữ liệu(HTML) 162 Page - Holtek Semiconductor Inc |
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162 / 224 page ![]() Rev. 1.00 1�� De�e��e� 0�� �01� Rev. 1.00 1�3 De�e��e� 0�� �01� HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU Data, Parity and Stop Bit Selection Theformatofthedatatobetransferrediscomposedofvariousfactorssuchasdatabitlength, parityon/off,paritytype,addressbitsandthenumberofstopbits.Thesefactorsaredeterminedby thesetupofvariousbitswithintheUCR1register.TheBNObitcontrolsthenumberofdatabits whichcanbesettoeither8or9,thePRTbitcontrolsthechoiceofoddorevenparity,thePREN bitcontrolstheparityon/offfunctionandtheSTOPSbitdecideswhetheroneortwostopbitsareto beused.Thefollowingtableshowsvariousformatsfordatatransmission.Theaddressbitidentifies theframeasanaddresscharacter.Thenumberofstopbits,whichcanbeeitheroneortwo,is independentofthedatalength. Start Bit Data Bits Address Bits Parity Bits Stop Bit Example of 8-bit Data Formats 1 8 0 0 1 1 � 0 1 1 1 � 1 0 1 Example of 9-bit Data Formats 1 9 0 0 1 1 8 0 1 1 1 8 1 0 1 Transmitter Receiver Data Format Thefollowingdiagramshowsthetransmitandreceivewaveformsforboth8-bitand9-bitdata formats. St ar t B it Bi t 0 Bi t 1 Bi t 2 Bi t 3 Bi t 4 Bi t 5 Bi t 6 Bi t 7 St op B it Ne xt St ar t Bi t Pa ri ty B it 8- Bi t Da ta F or ma t St ar t B it Bi t 0 Bi t 1 Bi t 2 Bi t 3 Bi t 4 Bi t 5 Bi t 6 Bi t 7 St op B it Ne xt St ar t Bi t Pa ri ty B it 9- Bi t Da ta F or ma t Bi t 8 UART Transmitter Datawordlengthsofeither8or9bitscanbeselectedbyprogrammingtheBNObitintheUCR1 register.WhenBNObitisset,thewordlengthwillbesetto9bits.Inthiscasethe9thbit,which istheMSB,needstobestoredintheTX8bitintheUCR1register.Atthetransmittercorelies theTransmitterShiftRegister,morecommonlyknownastheTSR,whosedataisobtainedfrom thetransmitdataregister,whichisknownastheTXR_RXRregister.Thedatatobetransmitted isloadedintothisTXR_RXRregisterbytheapplicationprogram.TheTSRregisterisnotwritten towithnewdatauntilthestopbitfromtheprevioustransmissionhasbeensentout.Assoonas thisstopbithasbeentransmitted,theTSRcanthenbeloadedwithnewdatafromtheTXR_RXR register,ifitisavailable.ItshouldbenotedthattheTSRregister,unlikemanyotherregisters,isnot directlymappedintotheDataMemoryareaandassuchisnotavailabletotheapplicationprogram fordirectread/writeoperations.Anactualtransmissionofdatawillnormallybeenabledwhenthe TXENbitisset,butthedatawillnotbetransmitteduntiltheTXR_RXRregisterhasbeenloaded withdataandthebaudrategeneratorhasdefinedashiftclocksource.However,thetransmission canalsobeinitiatedbyfirstloadingdataintotheTXR_RXRregister,afterwhichtheTXENbitcan beset.Whenatransmissionofdatabegins,theTSRisnormallyempty,inwhichcaseatransferto theTXR_RXRregisterwillresultinanimmediatetransfertotheTSR.Ifduringatransmissionthe TXENbitiscleared,thetransmissionwillimmediatelyceaseandthetransmitterwillbereset.The TXoutputpinwillthenreturntotheI/Oorotherpin-sharedfunction. |
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