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HT67F5652 bảng dữ liệu(PDF) 166 Page - Holtek Semiconductor Inc |
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HT67F5652 bảng dữ liệu(HTML) 166 Page - Holtek Semiconductor Inc |
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166 / 224 page  Rev. 1.00 1�� De�e��e� 0�� �01� Rev. 1.00 1�� De�e��e� 0�� �01� HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU Noise Error – NF Flag Over-samplingisusedfordatarecoverytoidentifyvalidincomingdataandnoise.Ifnoiseis detectedwithinaframethefollowingwilloccur: • Thereadonlynoiseflag,NF,intheUSRregisterwillbesetontherisingedgeoftheRXIFbit. • DatawillbetransferredfromtheShiftregistertotheTXR_RXRregister. • Nointerruptwillbegenerated.HoweverthisbitrisesatthesametimeastheRXIFbitwhich itselfgeneratesaninterrupt. NotethattheNFflagisresetbyaUSRregisterreadoperationfollowedbyaTXR_RXRregister readoperation. Framing Error – FERR Flag Thereadonlyframingerrorflag,FERR,intheUSRregister,issetifazeroisdetectedinsteadof stopbits.Iftwostopbitsareselected,bothstopbitsmustbehigh;otherwisetheFERRflagwillbe set.TheFERRflagisbufferedalongwiththereceiveddataandisclearedonanyreset. Parity Error – PERR Flag Thereadonlyparityerrorflag,PERR,intheUSRregister,issetiftheparityofthereceivedwordis incorrect.Thiserrorflagisonlyapplicableiftheparityisenabled,PREN=1,andiftheparitytype, oddorevenisselected.ThereadonlyPERRflagisbufferedalongwiththereceiveddatabytes.Itis clearedonanyreset.ItshouldbenotedthattheFERRandPERRflagsarebufferedalongwiththe correspondingwordandshouldbereadbeforereadingthedataword. UART Module Interrupt Structure SeveralindividualUARTconditionscangenerateaUARTinterrupt.Whentheseconditionsexist, alowpulsewillbegeneratedtogettheattentionofthemicrocontroller.Theseconditionsarea transmitterdataregisterempty,transmitteridle,receiverdataavailable,receiveroverrun,address detectandanRXpinwake-up.Whenanyoftheseconditionsarecreated,iftheglobalinterrupt enablebit,multi-functioninterruptenablebitanditscorrespondinginterruptcontrolbitareenabled andthestackisnotfull,theprogramwilljumptoitscorrespondinginterruptvectorwhereitcan beservicedbeforereturningtothemainprogram.Fouroftheseconditionshavethecorresponding USRregisterflagswhichwillgenerateaUARTinterruptifitsassociatedinterruptenablecontrolbit intheUCR2registerisset.Thetwotransmitterinterruptconditionshavetheirowncorresponding enablecontrolbits,whilethetworeceiverinterruptconditionshaveasharedenablecontrolbit. TheseenablebitscanbeusedtomaskoutindividualUARTinterruptsources. Theaddressdetectcondition,whichisalsoaUARTinterruptsource,doesnothaveanassociated flag,butwillgenerateaUARTinterruptwhenanaddressdetectconditionoccursifitsfunction isenabledbysettingtheADDENbitintheUCR2register.AnRXpinwake-up,whichisalsoa UARTinterruptsource,doesnothaveanassociatedflag,butwillgenerateaUARTinterruptifthe microcontrolleriswokenupfromIDLE0orSLEEPmodebyafallingedgeontheRXpin,ifthe WAKEandRIEbitsintheUCR2registerareset.NotethatintheeventofanRXwake-upinterrupt occurring,therewillbeacertainperiodofdelay,commonlyknownastheSystemStart-upTime,for theoscillatortorestartandstabilizebeforethesystemresumesnormaloperation. NotethattheUSRregisterflagsarereadonlyandcannotbeclearedorsetbytheapplication program,neitherwilltheybeclearedwhentheprogramjumpstothecorrespondinginterrupt servicingroutine,asisthecaseforsomeoftheotherinterrupts.Theflagswillbecleared automaticallywhencertainactionsaretakenbytheUART,thedetailsofwhicharegiveninthe UARTregistersection.TheoverallUARTinterruptcanbedisabledorenabledbytherelated interruptenablecontrolbitsintheinterruptcontrolregistersofthemicrocontrollertodecidewhether theinterruptrequestedbytheUARTmoduleismaskedoutorallowed. |
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