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HT67F5652 bảng dữ liệu(PDF) 81 Page - Holtek Semiconductor Inc |
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HT67F5652 bảng dữ liệu(HTML) 81 Page - Holtek Semiconductor Inc |
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81 / 224 page  Rev. 1.00 80 De�e��e� 0�� �01� Rev. 1.00 81 De�e��e� 0�� �01� HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU • TMnC0 Register (n=0) Bit 7 6 5 4 3 2 1 0 Na�e TnPAU TnCK� TnCK1 TnCK0 TnON TnRP� TnRP1 TnRP0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7 TnPAU:TMnCounterPauseControl 0:Run 1:Pause Thecountercanbepausedbysettingthisbithigh.Clearingthebittozerorestores normalcounteroperation.WheninaPauseconditiontheTMwillremainpoweredup andcontinuetoconsumepower.Thecounterwillretainitsresidualvaluewhenthisbit changesfromlowtohighandresumecountingfromthisvaluewhenthebitchanges toalowvalueagain. Bit6~4 TnCK2~TnCK0:SelectTMnCounterclock 000:fSYS/4 001:fSYS 010:fH/16 011:fH/64 100:fSUB 101:Reserved 110:TCKnrisingedgeclock 111:TCKnfallingedgeclock ThesethreebitsareusedtoselecttheclocksourcefortheTM.SelectingtheReserved clockinputwilleffectivelydisabletheinternalcounter.Theexternalpinclocksource canbechosentobeactiveontherisingorfallingedge.TheclocksourcefSYSisthe systemclock,whilefHandfSUBareotherinternalclocks,thedetailsofwhichcanbe foundintheoscillatorsection. Bit3 TnON:TMnCounterOn/OffControl 0:Off 1:On Thisbitcontrolstheoverallon/offfunctionoftheTM.Settingthebithighenablesthe countertorun,clearingthebitdisablestheTM.Clearingthisbittozerowillstopthe counterfromcountingandturnofftheTMwhichwillreduceitspowerconsumption. Whenthebitchangesstatefromlowtohightheinternalcountervaluewillbereset tozero,howeverwhenthebitchangesfromhightolow,theinternalcounterwill retainitsresidualvalue.IftheTMisintheCompareMatchOutputModethentheTM outputpinwillberesettoitsinitialcondition,asspecifiedbytheTnOCbit,whenthe TnONbitchangesfromlowtohigh. Bit2~0 TnRP2~TnRP0:TMnCCRP3-bitregister,comparedwiththeTMnCounterbit9~bit7 ComparatorPMatchPeriod 000:1024TMnclocks 001:128TMnclocks 010:256TMnclocks 011:384TMnclocks 100:512TMnclocks 101:640TMnclocks 110:768TMnclocks 111:896TMnclocks ThesethreebitsareusedtosetupthevalueontheinternalCCRP3-bitregister,which arethencomparedwiththeinternalcounter’shighestthreebits.Theresultofthis comparisoncanbeselectedtocleartheinternalcounteriftheTnCCLRbitissetto zero.SettingtheTnCCLRbittozeroensuresthatacomparematchwiththeCCRP valueswillresettheinternalcounter.AstheCCRPbitsareonlycomparedwiththe highestthreecounterbits,thecomparevaluesexistin128clockcyclemultiples. Clearingallthreebitstozeroisineffectallowingthecountertooverflowatits maximumvalue. |
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