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HT67F5652 bảng dữ liệu(PDF) 159 Page - Holtek Semiconductor Inc

tên linh kiện HT67F5652
Giải thích chi tiết về linh kiện  24-Bit Delta Sigma A/D LCD Flash MCU
PDF  224 Pages
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nhà sản xuất  HOLTEK [Holtek Semiconductor Inc]
Trang chủ  http://www.holtek.com
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Rev. 1.00
158
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Rev. 1.00
159
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HT67F5652
24-Bit Delta Sigma A/D + LCD Flash MCU
HT67F5652
24-Bit Delta Sigma A/D + LCD Flash MCU
Bit3
WAKE:RXpinfallingedgewake-upfunctionenablecontrol
0:RXpinwake-upfunctionisdisabled
1:RXpinwake-upfunctionisenabled
Thebitenablesordisablesthereceiverwake-upfunction.Ifthisbitisequalto1and
thedeviceisinIDLE0orSLEEPmode,afallingedgeontheRXpinwillwakeupthe
device.Ifthisbitisequalto0andthedeviceisinIDLEorSLEEPmode,anyedge
transitionsontheRXpinwillnotwakeupthedevice.
Bit2
RIE:Receiverinterruptenablecontrol
0:Receiverrelatedinterruptisdisabled
1:Receiverrelatedinterruptisenabled
Thisbitenablesordisablesthereceiverinterrupt.Ifthisbitisequalto"1"andwhen
thereceiveroverrunflagOERRorreceivedataavailableflagRXIFisset,theUART
interruptrequestflagwillbeset.Ifthisbitisequalto"0",theUARTinterruptrequest
flagwillnotbeinfluencedbytheconditionoftheOERRorRXIFflags.
Bit1
TIIE:TransmitterIdleinterruptenablecontrol
0:Transmitteridleinterruptisdisabled
1:Transmitteridleinterruptisenabled
Thisbitenablesordisablesthetransmitteridleinterrupt.Ifthisbitisequalto"1"and
whenthetransmitteridleflagTIDLEisset,duetoatransmitteridlecondition,the
UARTinterruptrequestflagwillbeset.Ifthisbitisequalto"0",theUARTinterrupt
requestflagwillnotbeinfluencedbytheconditionoftheTIDLEflag.
Bit0
TEIE:TransmitterEmptyinterruptenablecontrol
0:Transmitteremptyinterruptisdisabled
1:Transmitteremptyinterruptisenabled
Thisbitenablesordisablesthetransmitteremptyinterrupt.Ifthisbitisequalto"1"
andwhenthetransmitteremptyflagTXIFisset,duetoatransmitteremptycondition,
theUARTinterruptrequestflagwillbeset.Ifthisbitisequalto"0",theUART
interruptrequestflagwillnotbeinfluencedbytheconditionoftheTXIFflag.
• TXR_RXR Register
Bit
7
6
5
4
3
2
1
0
Na�e
TXRX�
TXRX�
TXRX5
TXRX4
TXRX3
TXRX�
TXRX1
TXRX0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
x
x
x
x
x
x
x
x
"x" unknown
Bit7~0
TXRX7~TXRX0:UARTTransmit/ReceiveDatabit7~bit0
• BRG Register
Bit
7
6
5
4
3
2
1
0
Na�e
BRG�
BRG�
BRG5
BRG4
BRG3
BRG�
BRG1
BRG0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
x
x
x
x
x
x
x
x
"x" unknown
Bit7~0
BRG7~BRG0:BaudRatevalues
ByprogrammingtheBRGHbitinUCR2Registerwhichallowsselectionofthe
relatedformuladescribedaboveandprogrammingtherequiredvalueintheBRG
register,therequiredbaudratecanbesetup.
Note:Baudrate=fSYS/[64×(N+1)]ifBRGH=0.
Baudrate=fSYS/[16×(N+1)]ifBRGH=1.



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