BLUENRG-2 datasheet(22/190 Pages) STMICROELECTRONICS

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Functional details

BlueNRG-2

22/190

DocID030675 Rev 2

The low-frequency clock is used in low power mode and can be supplied either by a 32.7

kHz oscillator that uses an external crystal and guarantees up to ±50 ppm frequency

tolerance, or by a ring oscillator with maximum ±500 ppm frequency tolerance, which does

not require any external components.

The primary high-speed frequency clock is a 16 MHz or 32 MHz crystal oscillator. A fast-

starting 16 MHz ring oscillator provides the clock while the crystal oscillator is starting up.

Frequency tolerance of high-speed crystal oscillator is ±50 ppm.

The usage of the 16 MHz (or 32 MHz) crystal is strictly necessary for RF communications.

The clock tree for the peripherals is as follows:

Figure 6: Clock tree

When 32 MHz XO is used, only the Cortex-M0, the DMA and the APB tree

(except for BLE radio access) runs at 32 MHz. The rest of the clock tree is divided

by two and stays at 16 MHz.

The following clocks can be enabled/disabled by software to implement optimal power

consumption:



DMA



BLE controller



BLE clock generator



RNG



Flash controller



GPIO



System controller



UART



SPI



I2C1a



I2C2

a The I2C1 is not available in WLCSP34 package.

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