BLUENRG-2 datasheet(138/190 Pages) STMICROELECTRONICS

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Functional details

BlueNRG-2

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Table 176: WDG - MIS register description: address offset WDG_BASE_ADDR+0x14

Bit

Field name

Reset

Description

MIS

0x0

Watchdog masked interrupt status bit. Masked value of

watchdog interrupt status:

0: watchdog interrupt is not active.

1: watchdog interrupt is active.

Read-only bit. A write has no effect.

31:1

RESERVED

0x0

RESERVED

Table 177: WDG - LOCK register description: address offset WDG_BASE_ADDR+0xC00

Bit

Field

name

Reset

Description

31:0

LOCKVAL

0x0

Watchdog lock value. When read, returns the lock status:

0: Write access to all watchdog other registers is enabled.

1: Write access to all watchdog other registers is disabled.

When written, allows enabling or disabling write access to all

other watchdog registers:

Writing 0x1ACCE551: Write access to all other registers is

enabled.

Writing any other value: Write access to all other registers is

disabled.

3.15

RTC

3.15.1

Introduction

The RTC timer can be used to provide an interrupt at regular time intervals. It generates an

interrupt signal when it reaches zero after decrementing for a programmed number of

cycles of the real-time clock input. The RTC timer can restart automatically from a load

value when reaching zero if the auto restart mode is enabled, or it can stop when it reaches

zero.

The RTC is clocked by the 32 kHz clock and is switched off in low-power modes which

prevents this timer to be used for wakeup events.

3.15.2

Functional description

The RTC peripheral can be used either as real-time clock timer or as real-time clock watch.

3.15.2.1

Real-time clock timer

The real-time clock timer (RTC timer) can be used to provide an interrupt at regular time

intervals.

The RTC timer can restart automatically from a load value when reaching zero if the auto

restart mode is enabled, or it can stop when it reaches zero.

The RTC timer has the following features:



32-bit down-counter.



Interrupt generation when timer reaches zero.



Start, auto restart (after counts to zero) and stop capability.



On-the-fly register read and write access.

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