LPC47M182 datasheet(38/223 Pages) SMSC

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Advanced I/O Controller with Motherboard GLUE Logic

Datasheet

Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)

SMSC LPC47M182

DATASHEET

6.4

Floppy Disk Controller

The Floppy Disk controller (FDC) provides the interface between a host microprocessor and the floppy

disk drives. The FDC integrates the functions of the Formatter/Controller, Digital data Separator, Write

Precompensation and Data Rate Selection logic for an IBM XT/AT compatible FDC. The true CMOS 765B

core guarantees 100% IBM PC XT/AT compatibility in addition to providing data overflow and underflow

protection.

The FDC is compatible to the 82077AA using SMSC’s proprietary floppy disk controller core.

6.4.1

FDC Configuration Registers

The FDC configuration registers are summarized in Table 11.1 in Chapter 11 Configuration. The FDC

logical device configuration registers (0xF0, 0xF1, 0xF2 and 0xF4) are defined in Table 11.9.

6.4.2

FDC Internal Registers

The Floppy Disk Controller contains eight internal registers which facilitate the interfacing between the host

microprocessor and the disk drive. Table 6.2 shows the addresses required to access these registers.

Registers other than the ones shown are not supported. The rest of the description assumes that the

primary addresses have been selected.

Table 6.2 - Status, Data and Control Registers

(Shown with base addresses of 3F0 and 370)

PRIMARY

ADDRESS

SECONDARY

ADDRESS

R/W

3F0

3F1

3F2

3F3

3F4

3F5

3F6

3F7

370

371

372

373

374

375

376

377

R/W

Status Register A (SRA)

Status Register B (SRB)

Digital Output Register (DOR)

Tape Drive Register (TDR)

Main Status Register (MSR)

Data Rate Select Register (DSR)

Data (FIFO)

Reserved

Digital Input Register (DIR)

Configuration Control Register (CCR)

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