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CC3220MODASM2MONR bảng dữ liệu(PDF) 46 Page - Texas Instruments

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CC3220MODASM2MONR bảng dữ liệu(HTML) 46 Page - Texas Instruments

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T2
T6
T7
T9
CLK
MISO
MOSI
T8
46
CC3220MOD, CC3220MODA
SWRS206B – MARCH 2017 – REVISED AUGUST 2017
www.ti.com
Submit Documentation Feedback
Product Folder Links: CC3220MOD CC3220MODA
Specifications
Copyright © 2017, Texas Instruments Incorporated
(1)
Timing parameter assumes a maximum load of 20 pF.
5.14.5 Peripherals Timing
This section describes the peripherals that are supported by the CC3220MODx and CC3220MODAx
modules, as follows:
•
SPI
•
I2S
•
GPIOs
•
I2C
•
IEEE 1149.1 JTAG
•
ADC
•
Camera parallel port
•
External Flash
•
UART
•
SD Host
•
Timers
5.14.5.1 SPI
5.14.5.1.1 SPI Master
The CC3220MODx and CC3220MODAx microcontroller includes one SPI module, which can be
configured as a master or slave device. The SPI includes a serial clock with programmable frequency,
polarity, and phase; a programmable timing control between chip select and external clock generation;
and a programmable delay before the first SPI word is transmitted. Slave mode does not include a dead
cycle between two successive words.
Figure 5-8 shows the timing diagram for the SPI master.
Figure 5-8. SPI Master Timing Diagram
Table 5-4 lists the timing parameters for the SPI master.
Table 5-4. SPI Master Timing Parameters
ITEM
NAME
DESCRIPTION
MIN
MAX
UNIT
F(1)
Clock frequency
20
MHz
T2
Tclk
(1)
Clock period
50
ns
D(1)
Duty cycle
45%
55%
T6
tIS
(1)
RX data setup time
1
ns
T7
tIH
(1)
RX data hold time
2
ns
T8
tOD
(1)
TX data output delay
8.5
ns
T9
tOH
(1)
TX data hold time
8
ns



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