TMS320DM6431 datasheet(110/227 Pages) TI1

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TMS320DM6431

Digital Media Processor

SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

Table 3-47. EMIFA/VPSS Sub-Block 1 Pin-By-Pin Mux Control

MULTIPLEXED FUNCTIONS

SIGNAL

EMIFA

GPIO(1)

NAME

FUNCTION

SELECT

FUNCTION

SELECT

EM_CS5/GP[33]

EM_CS5

CS5SEL = 1

GP[33]

CS5SEL = 0

EM_CS4/GP[32]

EM_CS4

CS4SEL = 1

GP[32]

CS4SEL = 0

GP[31]

GP[30]

GP[29]

GP[28]

GP[27]

–

GP[26]/(FASTBOOT)

GP[26]

GP[25]/(BOOTMODE3)

GP[25]

GP[24]/(BOOTMODE2)

GP[24]

GP[23]/(BOOTMODE1)

GP[23]

GP[22]/(BOOTMODE0)

GP[22]

EM_D[7]/GP[21]

EM_D[7]

GP[21]

EM_D[6]/GP[20]

EM_D[6]

GP[20]

EM_D[5]/GP[19]

EM_D[5]

GP[19]

EM_D[4]/GP[18]

EM_D[4]

GP[18]

AEM = 1/5

AEM = 0

EM_D[3]/GP[17]

EM_D[3]

GP[17]

EM_D[2]/GP[16]

EM_D[2]

GP[16]

EM_D[1]/GP[15]

EM_D[1]

GP[15]

EM_D[0]/GP[14]

EM_D[0]

GP[14]

EM_CS3/GP[13]

EM_CS3

CS3SEL = 1

GP[13]

CS3SEL = 0

EM_CS2/GP[12]

EM_CS2

GP[12]

EM_A[1]/(ALE)/

EM_A[1]/(ALE)

GP[9]

GP[9]/(AEAW1/PLLMS1)

AEM = 1/5

AEM = 0

EM_A[2]/(CLE)/GP[8]/

EM_A[2]/(CLE)

GP[8]

(AEAW0/PLLMS0)

EM_A[3]/GP[11]

EM_A[3]

GP[11]

EM_A[4]/GP[10]/

EM_A[4]

GP[10]

(AEAW2/PLLMS2)

AEM = 1

AEM = 0/5

EM_A[0]/GP[7]/(AEM2)

EM_A[0]

GP[7]

EM_BA[0]/GP[6]/(AEM1)

EM_BA[0]

GP[6]

EM_BA[1]/GP[5]/(AEM0)

EM_BA[1]

GP[5]

(1)

GP[31:22] are standalone pins. They are not muxed with any other functions, but they are included in this table because they are

grouped in the EMIFA/VPSS Sub-Block 1.

Table 3-48. EMIFA/VPSS Sub-Block 3 Pin-By-Pin Mux Control

MULTIPLEXED FUNCTIONS

SIGNAL

NAME

EMIFA

GPIO

FUNCTION

SELECT

FUNCTION

SELECT

EM_A[12]/GP[89]

EM_A[12]

GP[89]

EM_A[11]/GP[90]

EM_A[11]

GP[90]

EM_A[10]/GP[91]

EM_A[10]

GP[91]

EM_A[9]/GP[92]

EM_A[9]

GP[92]

AEM = 1

AEM = 0/5

EM_A[8]/GP[93]

EM_A[8]

GP[93]

EM_A[7]/GP[94]

EM_A[7]

GP[94]

EM_A[6]/GP[95]

EM_A[6]

GP[95]

EM_A[5]/GP[96]

EM_A[5]

GP[96]

Device Configurations

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