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WM8232 bảng dữ liệu(PDF) 85 Page - Cirrus Logic

tên linh kiện WM8232
Giải thích chi tiết về linh kiện  105MSPS 3-Channel AFE with Sensor
PDF  141 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8232 bảng dữ liệu(HTML) 85 Page - Cirrus Logic

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WM8232
Rev 4.6
85
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R117 (75h)
AGC peak
level IN2 LSB
7:0
PEAK_IN2[7:0]
0000_0000
LSBs of detected peak level of IN2 (Read Only)
Register 75h AGC peak level IN2 LSB
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R118 (76h)
AGC peak
level IN2
MSB
1:0
PEAK_IN2[9:8]
00
MSBs of detected peak level of IN2 (Read Only)
Register 76h AGC peak level IN2 MSB
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R123 (7Bh)
AGC peak
level IN3 LSB
7:0
PEAK_IN3[7:0]
0000_0000
LSBs of detected peak level of IN3 (Read Only)
Register 7Bh AGC peak level IN3 LSB
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R124 (7Ch)
AGC peak
level IN3
MSB
1:0
PEAK_IN3[9:8]
00
MSBs of detected peak level of IN3 (Read Only)
Register 7Ch AGC peak level IN3 MSB
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R128 (80h)
DLL config 1
5:4
DLGAIN[1:0]
01
gain control of DLL delay line
Need to set according to input frequency. See details in
“PLL DLL Setup”
2
DLLRST
0
reset DLL delay line
0 = normal
1= reset DLL
1
CKOSTB
0
standby TG clock output
0 = generate TG clock
1 = stop generation of TG clock
0
AFECKSTB
0
standby AFE clock (VSMP/RSMP/ADCK) output
0 = generate AFE clock
1 = stop generation of AFE clock
Register 80h DLL config 1
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R129 (81h)
DLL config 2
5:4
LVDLGAIN[1:0]
01
gain control of LVDS DLL delay line
Need to set according to input frequency. See details in
“PLL DLL Setup”



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