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STM32F328C8 bảng dữ liệu(PDF) 22 Page - STMicroelectronics |
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STM32F328C8 bảng dữ liệu(HTML) 22 Page - STMicroelectronics |
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22 / 109 page ![]() Functional overview STM32F328C8 22/109 DocID026351 Rev 3 3.14.4 Independent watchdog The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is clocked from an independent 40 kHz internal RC and as it operates independently from the main clock, it can operate in Stop mode. It can be used either as a watchdog to reset the device when a problem occurs, or as a free running timer for application timeout management. It is hardware or software configurable through the option bytes. The counter can be frozen in debug mode. 3.14.5 Window watchdog The window watchdog is based on a 7-bit downcounter that can be set as free running. It can be used as a watchdog to reset the device when a problem occurs. It is clocked from the main clock. It has an early warning interrupt capability and the counter can be frozen in debug mode. 3.14.6 SysTick timer This timer is dedicated to real-time operating systems, but could also be used as a standard down counter. It features: • A 24-bit down counter • Autoreload capability • Maskable system interrupt generation when the counter reaches 0. • Programmable clock source 3.15 Real-time clock (RTC) and backup registers The RTC and the 5 backup registers are supplied through a switch that takes power from either the VDD supply when present or the VBAT pin. The backup registers are five 32-bit registers used to store 20 bytes of user application data when VDD power is not present. They are not reset by a system or power reset. |
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