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STM32F328C8 bảng dữ liệu(PDF) 73 Page - STMicroelectronics

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STM32F328C8
Electrical characteristics
100
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
•
A supply overvoltage is applied to each power supply pin
•
A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78A IC latch-up standard.
6.3.12
I/O current injection characteristics
As a general rule, current injection to the I/O pins, due to external voltage below VSS or
above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product
operation. However, in order to give an indication of the robustness of the microcontroller in
cases when abnormal injection accidentally happens, susceptibility tests are performed on a
sample basis during device characterization.
Functional susceptibility to I/O current injection
While a simple application is executed on the device, the device is stressed by injecting
current into the I/O pins programmed in floating input mode. While current is injected into
the I/O pin, one at a time, the device is checked for functional failures.
The failure is indicated by an out of range parameter: ADC error above a certain limit (higher
than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out
of –5 µA/+0 µA range), or other functional failure (for example reset occurrence or oscillator
frequency deviation). The test results are given in Table 45: I/O current injection
susceptibility.
Table 44. Electrical sensitivities
Symbol
Parameter
Conditions
Class
LU
Static latch-up class
TA = +105 °C conforming to JESD78A
II level A
Table 45. I/O current injection susceptibility
Symbol
Description
Functional susceptibility
Unit
Negative
injection
Positive
injection
IINJ
Injected current on BOOT0
-0
NA
mA
Injected current on PB11, other TT, FT, FTf and NPOR
pins
-5
NA
Injected current onPC0, PC1, PC2, PC3 (TTa pins)
and PF1 pin (FT pin).
0+5



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