STM8S105C4 datasheet(85/121 Pages) STMICROELECTRONICS

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STM8S105x4/6

Electrical characteristics

10.3.11

10-bit ADC characteristics

Subject to general operating conditions for VDDA, fMASTER, and TA unless otherwise

specified.

Table 44. ADC characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fADC

ADC clock frequency

VDD= 2.95 to 5.5 V

MHz

VDD= 4.5 to 5.5 V

VDDA

Analog supply

3.0

5.5

VREF+

Positive reference voltage

2.75(1)

1. Data guaranteed by design, not tested in production.

-VDDA

VREF-

Negative reference voltage

VSSA

0.5(1)

VAIN

Conversion voltage range(2)

2. During the sample time, the sampling capacitance, CAIN (3 pF max), can be charged/discharged by the

external source. The internal resistance of the analog source must allow the capacitance to reach its final

voltage level within tS. After the end of the sample time tS, changes of the analog input voltage have no

effect on the conversion result. Values for the sample clock tS depend on programming.

VSSA

VDDA

Devices with

external

VREF+/VREF-

VREF-

VREF+

CADC

Internal sample and hold

capacitor

tS(2)

Minimum sampling time

fADC = 4 MHz

0.75

µs

fADC = 6 MHz

0.5

tSTAB

Wakeup time from standby

7.0

µs

tCONV

Minimum total conversion time

(including sampling time, 10-

bit resolution)

fADC = 4 MHz

3.5

µs

fADC = 6 MHz

2.33

µs

-14

1/fADC

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