STV2050A datasheet(47/83 Pages) STMICROELECTRONICS

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STV2050A - CONVERGENCE

9.1.3 Field Offset Canceller

This offset value is totalled after the gain correction. Its purpose is mainly to cancel the differ-

ential offset between all channels (see refer to Section 11 "ELECTRICAL LOOP" on page 55).

D2 Register: Fine horizontal

D3 Register: Fine vertical

The Field offset values are in two’s complement.

Note: During the vertical retrace, the field offset canceller values are the only correction values available

on the convergence outputs. Refer to Section 9.6 "NORMAL TV OPERATION MODE" on page 48.

9.2 DYNAMIC VALUES

Dynamic values are stored in register addresses 00 to CF in the three red, blue and green

banks. For their allocation, refer to Section 4.1 "CONVERGENCE CORRECTION VALUES"

on page 18.

The dynamic values can be adjusted from -512 to +511

9.3 INTERLACE

The interlace correction value is defined by the ICV[5:0] bits in the DA register.

This value is added to each convergence value in the field chosen by the IFA bit in the DA reg-

ister.

The interlace mode is enabled by the IIE bit in the DA register.

ORG[7:0]

Red Channel

OGH[7:0]

Green Channel

OBH[7:0]

Blue Channel

ORV[7:0]

Red Channel

OGV[7:0]

Green Channel

OBV[7:0]

Blue Channel

Binary Code

MSB --> LSB

-512

’00 0000 0000’

’10 0000 0000’

+512

’11 1111 1111’

IIE

0 = No interlace

1 = Interlace mode

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