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STV2050A bảng dữ liệu(PDF) 42 Page - STMicroelectronics

tên linh kiện STV2050A
Giải thích chi tiết về linh kiện  AUTOMATIC MULTISCAN DIGITAL CONVERGENCE PROCESSOR
PDF  83 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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STV2050A - BLANKING OF VIDEO SIGNALS
8 BLANKING OF VIDEO SIGNALS
The output of the RGB signals can be set to 0V during the horizontal and vertical retrace. The
function is controlled by the D6 register. The horizontal and vertical retrace blanking function
can be enabled independently.
8.1 HORIZONTAL BLANKING
The HBE bit in the D6 register is used to enable/disable the horizontal blanking.
The start and end edge positions are determined by the HVB[5:0] bits in the D6 register.
If the horizontal blanking is enabled, the video outputs are set to 0V from the HVB clock cycles
before grid line number 15 until the HVB clock cycles after grid line number 1. The useful
range for the HVB is one horizontal grid distance. This function is similar to the border line
function.
If ‘0’ is programmed, grid lines no. 15 and no. 1 are not blanked.
Figure 24. Horizontal Grid Lines
Note: If the HVB values are greater than the HGD values, unexpected effects will appear on the screen.
8.2 VERTICAL BLANKING
The enable/disable control is the VBE bit in the D6 register.
The start and end edge positions are determined using the VVB[5:0] bits in the D6 register.
The video blanking function ends when the programmed number of VVB video lines, following
vertical grid line no. 0, are finished and the next video line following the end of the DAC retrace
mode (DCT) has begun.
The VVB range is one vertical grid distance. The function works the same as the border line
function. If ‘0’ is programmed, grid lines no. 0 and no. 12 are not blanked. If the values pro-
HBE
0: Horizontal Blanking Off
1: Horizontal Blanking On
VBE
0: Vertical Blanking Off
1: Vertical Blanking On
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5
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0
1
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0
Horizontal Grid Lines
HVB
15
0V DAC Output
0V DAC Output
HVB
HVB
HVB
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