STV2050A datasheet(43/83 Pages) STMICROELECTRONICS

tên linh kiện	STV2050A

Giải thích chi tiết về linh kiện	AUTOMATIC MULTISCAN DIGITAL CONVERGENCE PROCESSOR

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STV2050A - BLANKING OF VIDEO SIGNALS

grammed for VVB are greater than those of the VGD, unexpected effects will appear on the

screen.

Figure 25. Vertical Blanking

8.3 BLANKING FOR AUTO-ALIGNMENT PATTERN

The blanking for the auto-alignment pattern and for the other video pattern are linked to the

same timing which is defined by the HVB and VVB bits as described in the following sections.

8.4 FAST BLANKING

The FBLK pin is used to provide a fast switching signal that selects the source of the video

signal to be displayed on the screen. Features are controlled by the D7 register.

HAE

0: Horizontal blanking off

1: Horizontal blanking on

VAE

0: Vertical blanking off

1: Vertical blanking on

STA

0: FBLK depends on the TVH, TVV and FAS bits (see below)

1: FBLK is forced to 1, if a pattern color is enabled by the COV bits.

(Refer to Section 7.1.1 "Pattern Selection" on page 33)

TVH

Blanking of TV picture in horizontal direction

0: Blanking off

1: Blanking on

V-Gridlines

VVB

V blank stop

V blank start

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