M16CSLASH62P datasheet(86/349 Pages) MITSUBISHI

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Interrupts

Mitsubishi microcomputers

M16C / 62P Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev.1.0

Specifications in this manual are tentative and subject to change.

Saving Registers

In the interrupt sequence, the FLG register and PC are saved to the stack.

At this time, the 4 high-order bits of the PC and the 4 high-order (IPL) and 8 low-order bits of the FLG

1.11.6 shows the stack status before and after an interrupt request is accepted.

The other necessary registers must be saved in a program at the beginning of the interrupt routine. Use

the PUSHM instruction, and all registers except SP can be saved with a single instruction.

Address

Content of previous stack

Stack

[SP]

SPvalue before

interrupt occurs

m – 1

m – 2

m – 3

m – 4

Stack status before interrupt request

is acknowledged

Stack status after interrupt request

is acknowledged

Content of previous stack

m + 1

MSB

LSB

m – 1

m – 2

m – 3

m – 4

Address

FLGL

Content of previous stack

Stack

FLGH

PCH

[SP]

New SP value

Content of previous stack

m + 1

MSB

LSB

Figure 1.11.6. Stack StatusBefore and After Acceptance of Interrupt Request

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