M16CSLASH62P datasheet(77/349 Pages) MITSUBISHI

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Mitsubishi microcomputers

M16C / 62P Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Interrupts

Under

development

Preliminary Specifications Rev.1.0

Specifications in this manual are tentative and subject to change.

Software Interrupts

A software interrupt occurs when executing certain instructions. Software interrupts are non-maskable

interrupts.

• Undefined Instruction Interrupt

An undefined instruction interrupt occurs when executing the UND instruction.

• Overflow Interrupt

An overflow interrupt occurs when executing the INTO instruction with the O flag set to “1” (the opera-

tion resulted in an overflow). The following are instructions whose O flag changes by arithmetic:

ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB

• BRK Interrupt

A BRK interrupt occurs when executing the BRK instruction.

• INT Instruction Interrupt

An INT instruction interrupt occurs when executing the INT instruction. Software interrupt Nos. 0 to 63

can be specified for the INT instruction. Because software interrupt Nos. 4 to 31 are assigned to

peripheral function interrupts, the same interrupt routine as for peripheral function interrupts can be

executed by executing the INT instruction.

In software interrupt Nos. 0 to 31, the U flag is saved to the stack during instruction execution and is

cleared to “0” (ISP selected) before executing an interrupt sequence. The U flag is restored from the

stack when returning from the interrupt routine. In software interrupt Nos. 32 to 63, the U flag does not

change state during instruction execution, and the SP then selected is used.

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