M16CSLASH62P datasheet(21/349 Pages) MITSUBISHI

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Mitsubishi microcomputers

M16C / 62P Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Reset

Under

development

Preliminary Specifications Rev.1.0

Specifications in this manual are tentative and subject to change.

Reset

There are four types of resets: a hardware reset, a software reset, an watchdog timer reset, and an oscilla-

tion stop detection reset.

Hardware Reset

There are two types of hardware resets: a hardware reset 1 and a hardware reset 2.

Hardware Reset 1

____________

A reset is applied using the RESET pin. When an “L” signal is applied to the RESET pin while the

power supply voltage is within the recommended operating condition, the pins are initialized (see

Table 1.5.1). The oscillation circuit is initialized and the main clock starts oscillating. When the input

____________

level at the RESET pin is released from “L” to “H”, the CPU and SFR are initialized, and the program

is executed starting from the address indicated by the reset vector. The internal RAM is not initialized.

____________

If the RESET pin is pulled “L” while writing to the internal RAM, the internal RAM becomes indetermi-

nate.

Figure 1.5.1 shows the example reset circuit. Figure 1.5.2 shows the reset sequence. Table 1.5.1

____________

shows the statuses of the other pins while the RESET pin is “L”. Figure 1.5.3 shows the CPU register

status after reset. Refer to “SFR” for SFR status after reset.

1. When the power supply is stable

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(1) Apply an “L” signal to the RESET pin.

(2) Supply a clock for 20 cycles or more to the XIN pin.

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(3) Apply an “H” signal to the RESET pin.

2. Power on

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(1) Apply an “L” signal to the RESET pin.

(2) Let the power supply voltage increase until it meets the recommended operating condition.

(3) Wait td(P-R) or more until the internal power supply stabilizes.

(4) Supply a clock for 20 cycles or more to the XIN pin.

____________

(5) Apply an “H” signal to the RESET pin.

Hardware Reset 2

This reset is generated by the microcomputer’s internal voltage detection circuit. The voltage detec-

tion circuit monitors the voltage supplied to the VCC1 pin.

If the VC26 bit in the VCR2 register is set to “1” (reset level detection circuit enabled), the microcom-

puter is reset when the voltage at the VCC1 input pin drops below Vdet3.

Similarly, if the VC25 bit in the VCR2 register is set to “1” (RAM retention limit detection circuit en-

abled), the microcomputer is reset when the voltage at the VCC1 input pin drops below Vdet2.

Conversely, when the input voltage at the VCC1 pin rises to Vdet3 or more, the pins and the CPU and

SFR are initialized, and the program is executed starting from the address indicated by the reset

vector. It takes about td(S-R) before the program starts running after Vdet3 is detected. The initialized

pins and registers and the status thereof are the same as in hardware reset 1.

Set the CM10 bit in the CM1 register to “1” (stop mode) after setting the VC25 bit to “1” (RAM retention

limit detection circuit enabled), and the microcomputer will be reset when the voltage at the VCC1

input pin drops below Vdet2 and comes out of reset when the voltage at the VCC1 input pin rises above

Vdet3. During stop mode, the value set in the VC26 bit has no effect. Therefore, no reset is generated

even when the input voltage at the VCC1 pin drops to Vdet3 or less.

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