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TMS570LS0332PZ bảng dữ liệu(PDF) 81 Page - Texas Instruments |
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TMS570LS0332PZ bảng dữ liệu(HTML) 81 Page - Texas Instruments |
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81 / 110 page  TMS570LS0432, TMS570LS0332 www.ti.com SPNS186B – OCTOBER 2012 – REVISED JUNE 2015 7.4.6 High-End Timer Transfer Unit (N2HET) A High-End Timer Transfer Unit (N2HET) can perform DMA type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the N2HET. 7.4.6.1 Features • CPU independent • Master Port to access system memory • 8 control packets supporting dual buffer configuration • Control packet information is stored in RAM protected by parity • Event synchronization (N2HET transfer requests) • Supports 32- or 64-bit transactions • Addressing modes for N2HET address (8 byte or 16 byte) and system memory address (fixed, 32-bit or 64-bit) • One shot, circular, and auto switch buffer transfer modes • Request lost detection 7.4.6.2 Trigger Connections Table 7-9. N2HET Request Line Connection MODULES REQUEST SOURCE HTU REQUEST N2HET HTUREQ[0] HTU DCP[0] N2HET HTUREQ[1] HTU DCP[1] N2HET HTUREQ[2] HTU DCP[2] N2HET HTUREQ[3] HTU DCP[3] N2HET HTUREQ[4] HTU DCP[4] N2HET HTUREQ[5] HTU DCP[5] N2HET HTUREQ[6] HTU DCP[6] N2HET HTUREQ[7] HTU DCP[7] Copyright © 2012–2015, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 81 Submit Documentation Feedback Product Folder Links: TMS570LS0432 TMS570LS0332 |
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