TMS570LS0332PZ datasheet(65/110 Pages) TI1

65 / 110 page

TRST

TMS

TCK

TDI

TDO

RTCK

BoundaryScan

BSR/BSDL

BoundaryScanI/F

SecondaryTap0

DAP

Debug APB

Debug

ROM1

APBslave

Cortex

TestTap0

eFuseFarm

SecondaryTap2

AJSM

TMS570LS0432, TMS570LS0332

www.ti.com

SPNS186B – OCTOBER 2012 – REVISED JUNE 2015

6.20 Debug Subsystem

6.20.1 Block Diagram

The device contains an ICEPICK module to allow JTAG access to the scan chains (see Figure 6-14).

Figure 6-14. Debug Subsystem Block Diagram

6.20.2 Debug Components Memory Map

Table 6-28. Debug Components Memory Map

FRAME ADDRESS RANGE

FRAME CHIP

FRAME

ACTUAL

RESPONSE FOR ACCESS TO

MODULE NAME

SELECT

SIZE

UNIMPLEMENTED LOCATIONS IN FRAME

START

END

CoreSight Debug

CSCS0

0xFFA0_0000

0xFFA0_0FFF

4KB

Reads return zeros, writes have no effect

ROM

Cortex-R4 Debug

CSCS1

0xFFA0_1000

0xFFA0_1FFF

4KB

Reads return zeros, writes have no effect

6.20.3 JTAG Identification Code

The JTAG ID code for this device is the same as the device ICEPick Identification Code.

Table 6-29. JTAG Identification Code

SILICON REVISION

IDENTIFICATION CODE

Initial Silicon

0x0B97102F

Revision A

0x1B97102F

Revision B

0x2B97102F

System Information and Electrical Specifications

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