CP3SP33SMSSLASHNOPB datasheet(287/407 Pages) TI1

287 / 407 page

16-BIt Shift Register

Write

Data

Write

Data

Clock Prescaler + Select

16-BIt Read Buffer

Control + Status

Slave

Master

MWnDAT

MWCSn

MDODIn

MSKn

Interrupt

Request

PCLK

Clock

Data Out

Data In

MSK

Slave

Master

MDIDOn

DS441

CP3SP33

www.ti.com

SNOSCW5 – MAY 2013

The master device supplies the synchronous clock (MSK) for the serial interface and initiates the data

transfer. The slave devices respond by sending (or receiving) the requested data. Each slave device uses

the master’s clock for serially shifting data out (or in), while the master shifts the data in (or out).

The three-wire system includes: the serial data in signal (MDIDO for master mode, MDODI for slave

mode), the serial data out signal (MDODI for master mode, MDIDO for slave mode), and the serial clock

(MSK).

In slave mode, an optional fourth signal (MWCS) may be used to enable the slave transmit. At any given

time, only one slave can respond to the master. Each slave device has its own chip select signal (MWCS)

for this purpose.

Figure 28-2 shows a block diagram of the Microwire serial interface in the device.

28.1.1 Shifting

The Microwire interface is a full duplex transmitter/receiver. A 16-bit shift register, which can be split into a

low and high byte, is used for both transmitting and receiving. In 8-bit mode, only the lower 8-bits are used

to transfer data. The transmit data is shifted out through MDODIn pin (master mode) or MDIDOn pin

(slave mode), starting with the MSB. At the same time, the receive data is shifted in through MDIDOn pin

(master mode) or MDODIn pin (slave mode), also starting with the MSB first.

The shift in and shift out are controlled by the MSK clock. In each clock cycle of MSK, one bit of data is

transmitted/received. The 16-bit shift register is accessible as the MWnDAT register. Reading the

MWnDAT register returns the value in the receive buffer. Writing to the MWnDAT register updates the 16-

bit transmit buffer.

Figure 28-2. Microwire Block Diagram

Dual Microwire/SPI Interfaces

287

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