PI7C8150BMA-33 datasheet(17/107 Pages) PERICOM

17 / 107 page

PI7C8150B

ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE

Page 17 of 107

April 2015 – Revision 2.1

CFG66 /

SCAN_EN_H /

CLK_RATE

125

K16

This is a multiplexed pin that has 3 functions (2 in

synchronous mode and 1 in asynchronous mode).

CFG66 - 66MHz Configuration (synchronous mode):

This pin is used to designate 66MHz operation. Tie

HIGH to enable 66MHz operation or tie LOW to

designate 33MHz operation.

SCAN_EN_H - Full-Scan Enable Control

(synchronous mode): When SCAN_EN_H is LOW,

full-scan is in shift operation. When SCAN_EN_H is

HIGH, full-scan is in parallel operation. Note: Valid only

in test mode. Pin is CFG66 in normal operation.

CLK_RATE – S_CLKOUT divider (asynchronous

mode): Determines the S_CLKOUT frequency relation

to ASYNC_CLK_IN.

0: S_SCLKOUT is half the frequency of

ASYNC_CLK_IN.

1: S_CLKOUT is the same frequency as

ASYNC_CLK_IN.

MS0, MS1

155, 106

B14, R16

Mode Selection: Selector for Asynchronous or

Synchronous mode.

MS0

MS1

Description

RESERVED

Synchronous Mode

Asynchronous Mode

2.2.5

GENERAL PURPOSE I/O INTERFACE SIGNALS

Name

Pin #

Type

Description

GPIO[3:0]

24, 25, 27, 28

J3, J2, J1, K1

General Purpose I/O Data Pins: The 4 general-

purpose signals are programmable as either input-only

or bi-directional signals by writing the GPIO output

enable control register in the configuration space.

2.2.6

JTAG BOUNDARY SCAN SIGNALS

Name

Pin #

Type

Description

TCK

133

H15

Test Clock. Used to clock state information and data

into and out of the PI7C8150B during boundary scan.

TMS

132

H14

Test Mode Select. Used to control the state of the Test

Access Port controller.

TDO

130

H16

Test Data Output. When SCAN_EN_H is HIGH, it is

used (in conjunction with TCK) to shift data out of the

Test Access Port (TAP) in a serial bit stream.

TDI

129

J15

Test Data Input. When SCAN_EN_H is HIGH, it is

used (in conjunction with TCK) to shift data and

instructions into the Test Access Port (TAP) in a serial

bit stream.

TRST_L

134

G15

Test Reset. Active LOW signal to reset the Test Access

Port (TAP) controller into an initialized state.

15-0048

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