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UPSD3312D bảng dữ liệu(PDF) 157 Page - STMicroelectronics |
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UPSD3312D bảng dữ liệu(HTML) 157 Page - STMicroelectronics |
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157 / 272 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) UPSD33xx Programmable counter array (PCA) with PWM Doc ID 9685 Rev 7 157/272 Figure 48. PWM mode - (x8), fixed frequency 1. m = 0: n = 0, 1, or 2 2. m = 1: n = 3, 4, or 5 26.8 PWM mode - (x8), programmable frequency In this mode, the PWM frequency is not determined by the overflow of the low byte of the Counter. Instead, the frequency is determined by the PWMFm register. The user can load a value in the PWMFm register, which is then compared to the low byte of the Counter. If there is a match, the Counter is cleared and the Load registers (PWMFm, CAPCOMHn) are re- loaded for the next PWM pulse. There is only one PWMFm register which serves all 3 TCM in a PCA block. If one of the TCM modules is operating in this mode, the other modules in the PCA must be configured to the same mode or left not to be used. The duty cycle of the PWM can be specified in the CAPCOMHn register as in the PWM with fixed frequency mode. Different TCM modules can have their own duty cycle. Note: The value in the Frequency register (PWMFm) must be larger than the duty cycle register (CAPCOM). CAPCOMHn OVERFLOW ENABLE 8 PCACLm 8 CAPCOMLn 8-bit COMPARATORn CEXn MATCH S R Q Q SET CLR 0 0 TCMMODEn 0 0 0 EINTF E_COMP CAP_PE CAP_NE MATCH TOGGLE PWM1 PWM0 AI07859 |
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