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AR0134CSSC00SUEAH-GEVB bảng dữ liệu(PDF) 25 Page - ON Semiconductor |
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AR0134CSSC00SUEAH-GEVB bảng dữ liệu(HTML) 25 Page - ON Semiconductor |
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25 / 41 page ![]() AR0134_DS Rev. G Pub. 6/15 EN 25 ©Semiconductor Components Industries, LLC,2015. AR0134: 1/3-Inch 1.2 Mp CMOS Digital Image Sensor Electrical Specifications Notes: 1. Minimum and maximum values are taken at 70°C, 1.7V and -30°C, 1.95V. All values are taken at the 50% transition point. The loading used is 10 pF. 2. Jitter from PIXCLK is already taken into account in the data for all of the output parameters. Notes: 1. Minimum and maximum values are taken at 70°C, 1.7V and -30°C, 1.95V. All values are taken at the 50% transition point. The loading used is 10 pF. 2. Jitter from PIXCLK is already taken into account in the data for all of the output parameters. Table 7: I/O Timing Characteristics, Parallel Output (2.8V VDD_IO)1 Symbol Definition Condition Min Typ Max Unit fEXTCLK Input clock frequency 650 MHz tEXTCLK Input clock period 20 166 ns tR Input clock rise time PLL enabled 3ns tF Input clock fall time PLL enabled 3ns tjJITTER Input clock jitter 600 ns tcp EXTCLK to PIXCLK propagation delay Nominal voltages, PLL disabled, PIXCLK slew rate = 4 5.3 13.4 ns tRP PIXCLK rise time PCLK slew rate = 6 1.3 4.0 ns tFP PIXCLK fall time PCLK slew rate = 6 1.3 3.9 ns PIXCLK duty cycle 40 50 60 % fPIXCLK PIXCLK frequency PIXCLK slew rate = 6, Data slew rate = 7 674.25 MHz tPD PIXCLK to data valid PIXCLK slew rate = 6, Data slew rate = 7 -2.5 2 ns tPFH PIXCLK to FV HIGH PIXCLK slew rate = 6, Data slew rate = 7 -2.5 2 ns tPLH PIXCLK to LV HIGH PIXCLK slew rate = 6, Data slew rate = 7 -2.5 2 ns tPFL PIXCLK to FV LOW PIXCLK slew rate = 6, Data slew rate = 7 -2.5 2 ns tPLL PIXCLK to LV LOW PIXCLK slew rate = 6, Data slew rate = 7 -2.5 2 ns CIN Input pin capacitance 2.5 pf |
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