UPD78323LP datasheet(28/86 Pages) NEC

28 / 86 page

µPD78323, 78324

Table 2-2. List of Special Function Registers (4/4)

FFF0H

FFF1H

FFF2H

FFF3H

FFF4H

FFF5H

FFF8H

FFF9H

––

Context switching enable register 0L

Context switching enable register 0H

Context switching enable register 1L

––

External interupt mode register 0

External interupt mode register 1

In-service priority register

Priority specify register

1 bit

8 bits

16 bits

Address

Special Function Register (SFR) Name

R/W

On Reset

Symbol

Manipulable Bit Unit

INTM0

INTM1

ISPR

PRSL

CSE0L

CSE0H

CSE1L

––

CSE0

CSE1

––

00H

––

00H

R/W

2.3

DATA MEMORY ADDRESSING

In the

µPD78324, the internal RAM space (FB00H to FEFFH) and the special function register area (FF00H to FFFFH)

are mapped in the FB00H to FFFFH area. In the FE20H to FF1FH space of the data memory, short direct addressing enables

direct addressing by 1-byte data in an instruction word.

Figure 2-6. Data Memory Addressing Space

Note When EA = L, and with the

µPD78323, this is external memory.

Caution For word access (including stack operations) to the main RAM area (FE00H-FEFFH), the address that

specifies the operand must be an even value.

FFFFH

FF1FH

FF00H

FEFFH

FE80H

FE00H

FB00H

7FFFH

0000H

Special Function Register

(SFR)

Main RAM

External Memory

General Register

Internal ROMNote

SFR Addressing

Short Direct Addressing

Direct Addressing

Based Addressing

Paste Indexed Addressing

(Provided with Displacement)

FE20H

Peripheral RAM

FDFFH

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