UM0097 datasheet(39/229 Pages) STMICROELECTRONICS

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UM0097

Peripheral firmware overview

39/229

RCCU_PCLK2Config

Example:

This example illustrates how to set the PCLK2 clock to RCLK / 2.

{

...

RCCU_PCLK2Config (RCCU_RCLK_2);

...

}

RCCU_PLL1Config

Example:

This example illustrates how to set the PLL1 multiplication factor to 20 and the divider factor

to 5.

{

...

RCCU_PLL1Config (RCCU_PLL1_Mul_20, RCCU_Div_5);

...

}

Function Name

RCCU_PCLK2Config

Function Prototype

void RCCU_PCLK2Config(Clock_Div New_Clock);

Behavior Description

This routine is used to select the division factor for RCLK to obtain the

PCLK2 clock for the APB2 peripherals (PCLK2).

Input Parameter

New_Clock: specifies the PCLK2 clock divider value. Refer to Clock

divider parameters on page 30 for more details on the allowed values of

this parameter.

Output Parameter

None

Return Value

None

Required preconditions

None

Called Functions

None

Function Name

RCCU_PLL1Config

Function Prototype

void RCCU_PLL1Config (RCCU_PLL1_Mul New_Mul,

RCCU_PLL_Div New_Div );

Behavior Description

This routine configures the PLL1 division and multiplication factors.

Input Parameter 1

New_Mul: the PLL1 clock multiplication factor. Refer to PLL1

multiplication factors on page 31 for more details on the allowed values

of this parameter.

Input Parameter 2

New_Div: the PLL1 clock division factor. Refer to PLL division factors on

page 32 for more details on the allowed values of this parameter.

Output Parameter

None

Return Value

None

Required preconditions

None

Called Functions

None

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