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UM0434 bảng dữ liệu(PDF) 50 Page - STMicroelectronics

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UM0434 bảng dữ liệu(HTML) 50 Page - STMicroelectronics

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UM0434
Register model
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4.6.2
Count register (CTR)
CTR can be used to hold a loop count that can be decremented and tested during execution
of branch instructions that contain an appropriately encoded BO field. If the CTR value is 0
before it is decremented, it is –1 afterward. The entire CTR can hold the branch target
address for a Branch Conditional to CTR (bcctr
x) instruction.
4.6.3
Link register (LR)
The link register, shown in
Table 20, provides the branch target address for the branch
conditional to LR instructions, and it holds the return address after branch and link
instructions.
CR
n[2]
4 * cr0 + eq (or eq)
4 * cr1 + eq
4 * cr2 + eq
4 * cr3 + eq
4 * cr4 + eq
4 * cr5 + eq
4 * cr6 + eq
4 * cr7 + eq
34
38
42
46
50
54
58
62
000
001
010
011
100
101
110
111
10
Equal (EQ).
For integer compare instructions: rA =
SIMM, UIMM, or rB.
CR
n[3]
4 * cr0 + so (or so)
4 * cr1 + so
4 * cr2 + so
4 * cr3 + so
4 * cr4 + so
4 * cr5 + so
4 * cr6 + so
4 * cr7 + so
35
39
43
47
51
55
59
63
000
001
010
011
100
101
110
111
11
Summary overflow (SO).
For integer compare instructions, this is a
copy of XER[SO] at instruction completion.
Table 18.
CR setting for compare instructions (continued)
CR
n
Bit
Bit Expression
CR Bits
BI
Description
Book E
0–2
3–4
Table 19.
Count register (CTR)
32
63
Field
Count value
Reset
Undefined on
m_por assertion, unchanged on p_reset_b assertion
R/W
R/W
SPR
SPR 9



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