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WM1811A bảng dữ liệu(PDF) 155 Page - Wolfson Microelectronics plc

tên linh kiện WM1811A
Giải thích chi tiết về linh kiện  Multi-Channel Audio Hub CODEC for Smartphones
PDF  328 Pages
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nhà sản xuất  WOLFSON [Wolfson Microelectronics plc]
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Production Data
WM1811A
w
PD, November 2013, Rev 4.1
155
Figure 51 Left Justified Audio Interface (assuming n-bit word length)
In I
2S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition.
The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and
the MSB of the next.
n
n-1
n-2
3
2
1
n
n-1
n-2
3
2
1
LEFT CHANNEL
RIGHT CHANNEL
MSB
LSB
Input Word Length (WL)
1/fs
LRCLK
BCLK
DACDAT/
ADCDAT
1 BCLK
1 BCLK
Figure 52 I2S Justified Audio Interface (assuming n-bit word length)
In DSP mode, the left channel MSB is available on either the 1
st (mode B) or 2nd (mode A) rising edge
of BCLK following a rising edge of LRCLK. Right channel data immediately follows left channel data.
Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles
between the LSB of the right channel data and the next sample.
The selected mode (Mode A or Mode B) is determined by the AIFnDAC_LRCLK_INV bits for the AIFn
digital input (playback) signal paths, and by the AIFnADC_LRCLK_INV bits for the AIFn digital output
(record) signal paths.
Note that the DSP Mode is selected independently for the input/output paths of each digital audio
interface.
In device master mode, the LRCLKoutput will resemble the frame pulse shown in Figure 53 and
Figure 54. In device slave mode, Figure 55 and Figure 56, it is possible to use any length of frame
pulse less than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK
period before the rising edge of the next frame pulse.



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