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WM1811A bảng dữ liệu(PDF) 53 Page - Wolfson Microelectronics plc

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Giải thích chi tiết về linh kiện  Multi-Channel Audio Hub CODEC for Smartphones
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Production Data
WM1811A
w
PD, November 2013, Rev 4.1
53
DMICCLK pin
DMICDAT pin
(Left & Right
channels interleaved)
1
2
1
2
1
2
Left Mic output
1
1
1
Right Mic output
2
2
2
hi-Z
Figure 16 Digital Microphone Interface Timing
The digital microphone channels can be routed to the AIF1 digital audio interface output paths.
Digital volume control of the digital microphone channels in the AIF1 signal paths is provided using
the registers described in the “Digital Volume and Filter Control” section.
The digital microphone channels can also be routed, in a limited number of configurations, to the
digital mixing output bus, via the digital sidetone signal paths. See “Digital Mixing” for further details.
Digital volume control of the digital microphone channels in the digital sidetone signal paths is
provided using the registers described in the “Digital Mixing” section.
The digital microphone interface control fields are described in Table 9.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R4 (0004h)
Power
Management
(4)
3
DMIC1L_ENA
0
Digital microphone (DMICDAT)
Left channel enable
0 = Disabled
1 = Enabled
2
DMIC1R_ENA
0
Digital microphone (DMICDAT)
Right channel enable
0 = Disabled
1 = Enabled
Table 9 Digital Microphone Interface Control



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