CY8C58LP datasheet(64/122 Pages) CYPRESS

64 / 122 page

PRELIMINARY

PSoC® 5LP: CY8C58LP Family

Datasheet

Document Number: 001-84932 Rev. **

Page 64 of 122

IDD[17]

Sleep Mode[21]

CPU = OFF

RTC = ON (= ECO32K ON, in low-power mode)

Sleep timer = ON (= ILO ON at 1 kHz)[21]

WDT = OFF

I2C Wake = OFF

Comparator = OFF

POR = ON

Boost = OFF

SIO pins in single ended input, unregulated output

mode

VDD = VDDIO = 4.5–5.5 V

T = –40 °C

–

1.9

3.1

µA

T = 25 °C

–

2.4

3.6

T = 85 °C

–

516

VDD = VDDIO = 2.7–3.6 V

T = –40 °C

–

1.7

3.1

T = 25 °C

–

23.6

T = 85 °C

–

4.2

VDD = VDDIO = 1.71–1.95 V T = –40 °C

–

1.6

3.1

T = 25 °C

–

1.9

3.6

T = 85 °C

–

4.2

Comparator = ON

CPU = OFF

RTC = OFF

Sleep timer = OFF

WDT = OFF

I2C Wake = OFF

POR = ON

Boost = OFF

SIO pins in single ended input, unregulated output

mode

VDD = VDDIO = 2.7–3.6 V[20] T = 25 °C

–

34.2

µA

I2C Wake = ON

CPU = OFF

RTC = OFF

Sleep timer = OFF

WDT = OFF

Comparator = OFF

POR = ON

Boost = OFF

SIO pins in single ended input, unregulated output

mode

VDD = VDDIO = 2.7–3.6 V[20] T = 25 °C

–

1.7

3.6

µA

Hibernate Mode[19]

Hibernate mode current

All regulators and oscillators off.

SRAM retention

GPIO interrupts are active

Boost = OFF

SIO pins in single ended input, unregulated output

mode

VDD = VDDIO = 4.5–5.5 V

T = –40 °C

–

0.2

µA

T = 25 °C

–

0.24

T = 85 °C

–

2.6

VDD = VDDIO = 2.7–3.6 V

T = –40 °C

–

0.11

T = 25 °C

–

0.3

T = 85 °C

–

215

VDD = VDDIO = 1.71–1.95 V T = –40 °C

–

0.9

T = 25 °C

–

0.11

T = 85 °C

–

1.8

IDDAR[20]

Analog current consumption while device is

reset[20]

VDDA ≤ 3.6 V

–

0.3

0.6

VDDA > 3.6 V

–

1.4

3.3

IDDDR[20]

Digital current consumption while device is reset[20] VDDD ≤ 3.6 V

–

1.1

3.1

VDDD > 3.6 V

–

0.7

3.1

IDD_PROG[20] Current consumption while device programming.

Sum of digital, analog, and I/Os: IDDD + IDDA +

IDDIOX.

–15

Table 11-2. DC Specifications

(continued)

Parameter

Description

Conditions

Min

Typ

Max

Units

Notes

19. If VCCD and VCCA are externally regulated, the voltage difference between VCCD and VCCA must be less than 50 mV.

20. Based on device characterization (Not production tested).

21. Sleep timer generates periodic interrupts to wake up the CPU. This specification applies only to those times that the CPU is off.

CY8C58LP bảng dữ liệu(PDF) 64 Page - Cypress Semiconductor

CY8C58LP bảng dữ liệu(HTML) 64 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL