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STM32F407IE bảng dữ liệu(PDF) 33 Page - STMicroelectronics |
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STM32F407IE bảng dữ liệu(HTML) 33 Page - STMicroelectronics |
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33 / 154 page ![]() STM32F405xx, STM32F407xx Description Doc ID 022152 Rev 1 33/154 The STM32F407xx includes the following features: ● Supports 10 and 100 Mbit/s rates ● Dedicated DMA controller allowing high-speed transfers between the dedicated SRAM and the descriptors (see the STM32F46x reference manual for details) ● Tagged MAC frame support (VLAN support) ● Half-duplex (CSMA/CD) and full-duplex operation ● MAC control sublayer (control frames) support ● 32-bit CRC generation and removal ● Several address filtering modes for physical and multicast address (multicast and group addresses) ● 32-bit status code for each transmitted or received frame ● Internal FIFOs to buffer transmit and receive frames. The transmit FIFO and the receive FIFO are both 2 Kbytes. ● Supports hardware PTP (precision time protocol) in accordance with IEEE 1588 2008 (PTP V2) with the time stamp comparator connected to the TIM2 input ● Triggers interrupt when system time becomes greater than target time |
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