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IMX53CEC bảng dữ liệu(PDF) 180 Page - Freescale Semiconductor, Inc |
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IMX53CEC bảng dữ liệu(HTML) 180 Page - Freescale Semiconductor, Inc |
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180 / 204 page  i.MX53xD Applications Processors for Consumer Products, Rev. 2 180 Freescale Semiconductor Package Information and Contact Assignments CSI0_DAT16 M1 — NVCC_CSI UHVIO ALT1 gpio6_GPIO[2] Input 360 K Ω PD CSI0_DAT17 N1 — NVCC_CSI UHVIO ALT1 gpio6_GPIO[3] Input 360 K Ω PD CSI0_DAT18 L2 — NVCC_CSI UHVIO ALT1 gpio6_GPIO[4] Input 360 K Ω PD CSI0_DAT19 L1 — NVCC_CSI UHVIO ALT1 gpio6_GPIO[5] Input 360 K Ω PD CSI0_DAT4 T7 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[22] Input 100 K Ω PU CSI0_DAT5 R3 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[23] Input 360 K Ω PD CSI0_DAT6 P7 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[24] Input 100 K Ω PU CSI0_DAT7 N7 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[25] Input 100 K Ω PU CSI0_DAT8 U2 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[26] Input 100 K Ω PU CSI0_DAT9 P3 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[27] Input 360 K Ω PD CSI0_DATA_EN P6 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[20] Input 100 K Ω PU CSI0_MCLK T6 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[19] Input 100 K Ω PU CSI0_PIXCLK U6 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[18] Input 100 K Ω PU CSI0_VSYNC U7 — NVCC_CSI UHVIO ALT1 gpio5_GPIO[21] Input 100 K Ω PU DI0_DISP_CLK AF2 — NVCC_LCD GPIO ALT1 gpio4_GPIO[16] Input 100 K Ω PU DI0_PIN15 AH6 — NVCC_LCD GPIO ALT1 gpio4_GPIO[17] Input 100 K Ω PU DI0_PIN2 AD7 — NVCC_LCD GPIO ALT1 gpio4_GPIO[18] Input 100 K Ω PU DI0_PIN3 AC7 — NVCC_LCD GPIO ALT1 gpio4_GPIO[19] Input 100 K Ω PU DI0_PIN4 AC6 — NVCC_LCD GPIO ALT1 gpio4_GPIO[20] Input 100 K Ω PU DISP0_DAT0 AD1 — NVCC_LCD GPIO ALT1 gpio4_GPIO[21] Input 100 K Ω PD DISP0_DAT1 AC3 — NVCC_LCD GPIO ALT1 gpio4_GPIO[22] Input 100 K Ω PD DISP0_DAT10 AG2 — NVCC_LCD GPIO ALT1 gpio4_GPIO[31] Input 100 K Ω PU DISP0_DAT11 AE3 — NVCC_LCD GPIO ALT1 gpio5_GPIO[5] Input 100 K Ω PD DISP0_DAT12 AC1 — NVCC_LCD GPIO ALT1 gpio5_GPIO[6] Input 100 K Ω PU DISP0_DAT13 AH3 — NVCC_LCD GPIO ALT1 gpio5_GPIO[7] Input 100 K Ω PU DISP0_DAT14 AG3 — NVCC_LCD GPIO ALT1 gpio5_GPIO[8] Input 100 K Ω PU DISP0_DAT15 AH4 — NVCC_LCD GPIO ALT1 gpio5_GPIO[9] Input 100 K Ω PU DISP0_DAT16 AG5 — NVCC_LCD GPIO ALT1 gpio5_GPIO[10] Input 100 K Ω PU DISP0_DAT17 AB6 — NVCC_LCD GPIO ALT1 gpio5_GPIO[11] Input 100 K Ω PU DISP0_DAT18 AJ4 — NVCC_LCD GPIO ALT1 gpio5_GPIO[12] Input 100 K Ω PU Table 118. PoP 12 x 12 mm Signal Assignments, Power Rails, and I/O (continued) Contact Name Power Rail I/O Buffer Type Out of Reset Condition1 Alt. Mode Function Direct ion Config./ Value |
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