IMX53CEC datasheet(134/204 Pages) FREESCALE

134 / 204 page

i.MX53xD Applications Processors for Consumer Products, Rev. 2

134

Freescale Semiconductor

Electrical Characteristics

Figure 85. UART RS-232 Serial Mode Transmit Timing Diagram

4.7.17.2.2

UART Receiver

Figure 86 depicts the RS-232 serial mode receive timing with 8 data bit/1 stop bit format. Table 89 lists

serial mode receive timing characteristics.

Figure 86. UART RS-232 Serial Mode Receive Timing Diagram

4.7.17.3

UART IrDA Mode Timing

The following subsections give the UART transmit and receive timings in IrDA mode.

4.7.17.3.3

UART IrDA Mode Transmitter

Figure 87 depicts the UART IrDA mode transmit timing, with 8 data bit/1 stop bit format. Table 90 lists

the transmit timing characteristics.

Table 88. RS-232 Serial Mode Transmit Timing Parameters

Parameter

Symbol

Min

Max

Units

UA1

Transmit Bit Time

tTbit

1/Fbaud_rate

1 –

Tref_clk

1 F

baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.

2 T

ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider).

1/Fbaud_rate +

Tref_clk

—

Table 89. RS-232 Serial Mode Receive Timing Parameters

Parameter

Symbol

Min

Max

Units

UA2

Receive Bit Time1

1 The UART receiver can tolerate 1/(16*F

baud_rate) tolerance in each bit. But accumulation tolerance in one frame must not

exceed 3/(16*Fbaud_rate).

tRbit

1/Fbaud_rate

2 –

1/(16*Fbaud_rate)

2 F

baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.

1/Fbaud_rate +

1/(16*Fbaud_rate)

—

Bit 1

Bit 2

Bit 0

Bit 4

Bit 5

Bit 6

Bit 7

TXD

(output)

Bit 3

Start

Bit

STOP

BIT

Start

Bit

Possible

Parity

Bit

Par Bit

UA1

Bit 1

Bit 2

Bit 0

Bit 4

Bit 5

Bit 6

Bit 7

RXD

(input)

Bit 3

Start

Bit

STOP

BIT

Start

Bit

Possible

Parity

Bit

Par Bit

UA2

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