KM416RD8AS-RBM80 datasheet(17/64 Pages) SAMSUNG

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Page 14

KM416RD8AS

Direct RDRAM™

Rev. 0.9 July 1999

Target

COL-to-COL Packet Interaction

Figure 8 shows three arbitrary packets on the COL pins.

Packets “b” and “c” must be separated by an interval

tCCDELAY which depends upon the command and address

values in all three packets. Table 12 summarizes the

tCCDELAY values for all possible cases.

Cases CC1 through CC5 summarize the rules for every situ-

ation other than the case when COPb is a WR command and

COPc is a RD command. In CC3, when a RD command is

followed by a WR command, a gap of tCAC -tCWD must be

inserted between the two COL packets. See Figure 4 for

more explanation of why this gap is needed. For cases CC1,

CC2, CC4, and CC5, there is no restriction (tCCDELAY is

tCC).

In cases CC6 through CC10, COPb is a WR command and

COPc is a RD command. The tCCDELAY value needed

between these two packets depends upon the command and

address in the packet with COPa. In particular, in case CC6

when there is WR-WR-RD command sequence directed to

the same device, a gap will be needed between the packets

with COPb and COPc. The gap will need a COLC packet

with a NOCOP command directed to any device in order to

force an automatic retire to take place. Figure 18 (right)

provides a more detailed explanation of this case.

In case CC10, there is a RD-WR-RD sequence directed to

the same device. If a prior write to the same device is unre-

tired when COPa is issued, then a gap will be needed

between the packets with COPb and COPc as in case CC6.

The gap will need a COLC packet with a NOCOP command

directed to any device in order to force an automatic retire to

take place.

Cases CC7, CC8, and CC9 have no restriction (tCCDELAY is

tCC).

For the purposes of analyzing COL-to-ROW interactions,

the PREC, WRA, and RDA commands of the COLC packet

are equivalent to the NOCOP, WR, and RD commands.

These commands also cause a precharge operation PREC to

take place. This precharge may be converted to an equiva-

lent PRER command on the ROW pins using the rules

summarized in Figure 14.

Figure 8: COL-to-COL Packet Interaction- Timing

CTM/CFM

DQA7..0

DQB7..0

COL4

..COL0

ROW2

..ROW0

T12

T13

T10

T14

T11

T15 T16

T17 T18 T19

COPa a1

Transaction a: COPa

COPc c1

Transaction b: COPb

Transaction c: COPc

a1 = {Da,Ba,Ca1}

b1 = {Db,Bb,Cb1}

c1 = {Dc,Bc,Cc1}

tCCDELAY

COPb b1

Table 12: COL-to-COL Packet Interaction - Rules

Case #

COPa

Ca1

COPb

Cb1

COPc

Cc1

tCCDELAY

Example

CC1

xxxx

xxxxx

x..x

NOCOP

Cb1

xxxx

xxxxx

x..x

tCC

CC2

xxxx

xxxxx

x..x

RD,WR

Cb1

NOCOP

xxxxx

x..x

tCC

CC3

xxxx

xxxxx

x..x

Cb1

xxxxx

x..x

tCC+tCAC -tCWD

Figure 4

CC4

xxxx

xxxxx

x..x

Cb1

xxxxx

x..x

tCC

Figure 15

CC5

xxxx

xxxxx

x..x

Cb1

xxxxx

x..x

tCC

Figure 16

CC6

== Db

x..x

Cb1

== Db

x..x

tRTR

Figure 18

CC7

== Db

x..x

Cb1

/= Db

x..x

tCC

CC8

/= Db

x..x

Cb1

== Db

x..x

tCC

CC9

NOCOP

== Db

x..x

Cb1

== Db

x..x

tCC

CC10

== Db

x..x

Cb1

== Db

x..x

tCC

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