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KM416RD8AS-RBM80 bảng dữ liệu(PDF) 55 Page - Samsung semiconductor

tên linh kiện KM416RD8AS-RBM80
Giải thích chi tiết về linh kiện  128Mbit RDRAM 256K x 16 bit x 2*16 Dependent Banks Direct RDRAMTM for Consumer Package
PDF  64 Pages
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nhà sản xuất  SAMSUNG [Samsung semiconductor]
Trang chủ  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM416RD8AS-RBM80 bảng dữ liệu(HTML) 55 Page - Samsung semiconductor

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Page 52
KM416RD8AS
Direct RDRAM™
Rev. 0.9July 1999
Target
CMOS - Transmit Timing
Figure 58 is a timing diagram which shows the detailed
requirements for the CMOS output signals. The SIO0 signal
is driven once per tCYCLE1 interval on the falling edge. The
clock-to-output window is tQ1,MIN/tQ1,MAX. The SCK and
SIO0 timing points are measured at the 50% level. The rise
and fall times of SIO0 are tQR1 and tQF1, measured at the
20% and 80% levels.
Figure 58: CMOS Timing - Data Signals for Transmit
VIH,CMOS
50%
VIL,CMOS
80%
20%
SCK
SIO0
tQR1
tQF1
VOH,CMOS
50%
VOL,CMOS
80%
20%
tQ1,MAX
VIH,CMOS
50%
VIL,CMOS
80%
20%
tQ1,MIN
VOH,CMOS
50%
VOL,CMOS
80%
20%
SIO0
tDR1
tDF1
tQR1
tQF1
tPROP1,MAX
tPROP1,MIN
or
SIO1
SIO1
or
SIO0



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