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ENC424J600 bảng dữ liệu(PDF) 42 Page - Microchip Technology |
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ENC424J600 bảng dữ liệu(HTML) 42 Page - Microchip Technology |
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42 / 168 page  ENC424J600/624J600 DS39935C-page 40 2010 Microchip Technology Inc. TABLE 4-1: SPI INSTRUCTION SET Instruction Mnemonic Instruction 1st Byte 2nd Byte 3rd Byte Nth Byte Bank 0 Select B0SEL 1100 0000 — — — Bank 1 Select B1SEL 1100 0010 — — — Bank 2 Select B2SEL 1100 0100 — — — Bank 3 Select B3SEL 1100 0110 — — — System Reset SETETHRST 1100 1010 — — — Flow Control Disable FCDISABLE 1110 0000 — — — Flow Control Single FCSINGLE 1110 0010 — — — Flow Control Multiple FCMULTIPLE 1110 0100 — — — Flow Control Clear FCCLEAR 1110 0110 — — — Decrement Packet Counter SETPKTDEC 1100 1100 — — — DMA Stop DMASTOP 1101 0010 — — — DMA Start Checksum DMACKSUM 1101 1000 — — — DMA Start Checksum with Seed DMACKSUMS 1101 1010 — — — DMA Start Copy DMACOPY 1101 1100 — — — DMA Start Copy and Checksum with Seed DMACOPYS 1101 1110 — — — Request Packet Transmission SETTXRTS 1101 0100 — — — Enable RX ENABLERX 1110 1000 — — — Disable RX DISABLERX 1110 1010 — — — Enable Interrupts SETEIE 1110 1100 — — — Disable Interrupts CLREIE 1110 1110 — — — Read Bank Select RBSEL 1100 1000 xxxx xxxx — — Write EGPRDPT WGPRDPT 0110 0000 dddd dddd DDDD DDDD — Read EGPRDPT RGPRDPT 0110 0010 xxxx xxxx XXXX XXXX — Write ERXRDPT WRXRDPT 0110 0100 dddd dddd DDDD DDDD — Read ERXRDPT RRXRDPT 0110 0110 xxxx xxxx XXXX XXXX — Write EUDARDPT WUDARDPT 0110 1000 dddd dddd DDDD DDDD — Read EUDARDPT RUDARDPT 0110 1010 xxxx xxxx XXXX XXXX — Write EGPWRPT WGPWRPT 0110 1100 dddd dddd DDDD DDDD — Read EGPWRPT RGPWRPT 0110 1110 xxxx xxxx XXXX XXXX — Write ERXWRPT WRXWRPT 0111 0000 dddd dddd DDDD DDDD — Read ERXWRPT RRXWRPT 0111 0010 xxxx xxxx XXXX XXXX — Write EUDAWRPT WUDAWRPT 0111 0100 dddd dddd DDDD DDDD — Read EUDAWRPT RUDAWRPT 0111 0110 xxxx xxxx XXXX XXXX — Read Control Register RCR 000a aaaa xxxx xxxx XXXX XXXX XXXX XXXX Write Control Register WCR 010a aaaa dddd dddd DDDD DDDD DDDD DDDD Read Control Register Unbanked RCRU 0010 0000 AAAA AAAA xxxx xxxx XXXX XXXX Write Control Register Unbanked WCRU 0010 0010 AAAA AAAA dddd dddd DDDD DDDD Bit Field Set BFS 100a aaaa dddd dddd DDDD DDDD DDDD DDDD Bit Field Clear BFC 101a aaaa dddd dddd DDDD DDDD DDDD DDDD Bit Field Set Unbanked BFSU 0010 0100 AAAA AAAA dddd dddd DDDD DDDD Bit Field Clear Unbanked BFCU 0010 0110 AAAA AAAA dddd dddd DDDD DDDD Read EGPDATA RGPDATA 0010 1000 xxxx xxxx XXXX XXXX XXXX XXXX Write EGPDATA WGPDATA 0010 1010 dddd dddd DDDD DDDD DDDD DDDD Read ERXDATA RRXDATA 0010 1100 xxxx xxxx XXXX XXXX XXXX XXXX Write ERXDATA WRXDATA 0010 1110 dddd dddd DDDD DDDD DDDD DDDD Read EUDADATA RUDADATA 0011 0000 xxxx xxxx XXXX XXXX XXXX XXXX Write EUDADATA WUDADATA 0011 0010 dddd dddd DDDD DDDD DDDD DDDD Legend: x /X = read data, d/D = write data, a = banked SFR address, A = unbanked SFR address. ‘X’ and ‘D’ are optional. |
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