STM32W108HB datasheet(15/179 Pages) STMICROELECTRONICS

15 / 179 page

STM32W108CB, STM32W108HB

Description

Doc ID 16252 Rev 2

15/179

These timers are capable of handling quadrature (incremental) encoder signals and the

digital outputs from 1 to 3 hall-effect sensors.

1.2.17

General purpose timers (TIMx)

There are up to 3 synchronizable standard timers embedded in STM32W108 devices.

These timers are based on a 16-bit auto-reload up/down counter, a 16-bit prescaler and

feature 4 independent channels each for input capture, output compare, PWM or one pulse

mode output. This gives up to 12 input captures / output compares / PWMs on the largest

packages. They can work together via the Timer Link feature for synchronization or event

chaining.

The counter can be frozen in debug mode.

Any of the standard timers can be used to generate PWM outputs. Each of the timers has

independent DMA request generations.

1.2.18

I²C bus

Up to two I²C bus interfaces can operate in multi-master and slave modes. They can support

standard and fast modes.

They support dual slave addressing (7-bit only) and both 7/10-bit addressing in master

mode. A hardware CRC generation/verification is embedded.

They can be served by DMA and they support SM Bus 2.0/PM Bus.

1.2.19

Universal synchronous/asynchronous receiver transmitter (USART)

The available USART interfaces communicate at up to 2.25 Mbit/s. They provide hardware

management of the CTS and RTS signals, support IrDA SIR ENDEC, are ISO 7816

compliant and have LIN Master/Slave capability.

The USART interfaces can be served by the DMA controller.

1.2.20

Serial peripheral interface (SPI)

Up to two SPIs are able to communicate up to 18 Mbits/s in slave and master modes in full-

duplex and simplex communication modes. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable from 8-bit to 16-bit. The hardware CRC

generation/verification supports basic SD Card/MMC modes.

Both SPIs can be served by the DMA controller.

1.2.21

GPIOs (general purpose inputs/outputs)

Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as

input (with or without pull-up or pull-down) or as Peripheral Alternate Function. Most of the

GPIO pins are shared with digital or analog alternate functions. All GPIOs are high

currentcapable.

The I/Os alternate function configuration can be locked if needed following a specific

sequence in order to avoid spurious writing to the I/Os registers.

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