STM32W108HB datasheet(138/179 Pages) STMICROELECTRONICS

138 / 179 page

Analog-to-digital converter

STM32W108CB, STM32W108HB

138/179

Doc ID 16252 Rev 2

9.3

Analog-to-digital converter (ADC) registers

9.3.1

ADC configuration register (ADC_CFG)

Address offset: 0xD004

Reset value:

0x0000 1800

ADC_PERIOD

ADC_

HVSE

ADC_

HVSE

ADC_MUXP

ADC_

MUXP

ADC_MUXN

ADC_1

MHZC

ST Re-

served

ADC_E

NABLE

[15:13] ADC_PERIOD: ADC sample time in clocks and the equivalent significant bits in the conversion.

0: 32 clocks (5 bits).4: 512 clocks (9 bits).

1: 64 clocks (6 bits).5: 1024 clocks (10 bits).

2: 128 clocks (7 bits).6: 2048 clocks (11 bits).

3: 256 clocks (8 bits).7: 4096 clocks (12 bits).

[12] ADC_HVSELP: Select voltage range for the P input channel.

0: Low voltage range (input buffer disabled).

1: High voltage range (input buffer enabled).

[11] ADC_HVSELN: Select voltage range for the N input channel.

0: Low voltage range (input buffer disabled).

1: High voltage range (input buffer enabled).

[10:7] ADC_MUXP: Input selection for the P channel.

0x0: PB5 pin.0x8: GND (0V) (not for high voltage range).

0x1: PB6 pin.0x9: VREF/2 (0.6V).

0x2: PB7 pin.0xA: VREF (1.2V).

0x3: PC1 pin.0xB: VREG/2 (0.9V) (not for high voltage range).

0x4: PA4 pin.0x6, 0x7, 0xC-0xF: Reserved.

0x5: PA5 pin.

[6:3] ADC_MUXN: Input selection for the N channel.

Refer to ADC_MUXP above for choices.

[2] ADC_1MHZCLK: Select ADC clock:

0: 6 MHz1: 1 MHz.

[1] Reserved: this bit must always be set to 0.

[0] ADC_ENABLE: Enable the ADC: write 1 to enable continuous conversions, write 0 to stop.

When the ADC is started the first conversion takes twice the usual number of clocks plus 21

microseconds. If anything in this register is modified while the ADC is running, the next

conversion takes twice the usual number of clocks.

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