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STM32W108HB bảng dữ liệu(PDF) 120 Page - STMicroelectronics |
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STM32W108HB bảng dữ liệu(HTML) 120 Page - STMicroelectronics |
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120 / 179 page  General-purpose timers STM32W108CB, STM32W108HB 120/179 Doc ID 16252 Rev 2 8.3.6 Timer x capture/compare mode register 2 (TIMx_CCMR2) Address offset: 0xE01C (TIM1) and 0xF01C (TIM2) Reset value: 0x0000 0000 Timer channels can be programmed as inputs (capture mode) or outputs (compare mode). The direction of channel y is defined by TIM_CCyS in this register. The other bits in this register have different functions in input and in output modes. The TIM_OC* fields only apply to a channel configured as an output (TIM_CCyS = 0), and the TIM_IC* fields only apply to a channel configured as an input (TIM_CCyS > 0). [1:0] TIM_CC1S: Capture / Compare 1 Selection This configures the channel as an output or an input. If an input, it selects the input source. 00: Channel is an output. 01: Channel is an input and is mapped to TI1. 10: Channel is an input and is mapped to TI2. 11: Channel is an input and is mapped to TRGI. This requires an internal trigger input selected by the TIM_TS bit in the TIM_SMCR register. Note: TIM_CC1S may be written only when the channel is off (TIM_CC1E = 0 in the TIMx_CCER register). 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 TIM_OC4M TIM_O C4BE TIM_O C4FE TIM_CC4S TIM_OC3M TIM_O C3BE TIM_O C3FE TIM_CC3S TIM_IC4F TIM_IC4PSC TIM_IC3F TIM_IC3PSC rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw |
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